Domain Knowledge-Based Automated Analog Circuit Design with Deep Reinforcement Learning
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Abstract (arXiv)
The design automation of analog circuits is a longstanding challenge in the integrated circuit field. This paper presents a deep reinforcement learning method to expedite the design of analog circuits at the pre-layout stage, where the goal is to find device parameters to fulfill desired circuit specifications. Our approach is inspired by experienced human designers who rely on domain knowledge of analog circuit design (e.g., circuit topology and couplings between circuit specifications) to tackle the problem. Unlike all prior methods, our method originally incorporates such key domain knowledge into policy learning with a graph-based policy network, thereby best modeling the relations between circuit parameters and design targets. Experimental results on exemplary circuits show it achieves human-level design accuracy (~99%) with 1.5x efficiency of existing best-performing methods. Our method also shows better generalization ability to unseen specifications and optimality in circuit performance optimization. Moreover, it applies to designing diverse analog circuits across different semiconductor technologies, breaking the limitations of prior ad-hoc methods in designing one particular type of analog circuits with conventional semiconductor technology.
Key facts. Cited by 7 papers in the map (data through 7 Oct 2026). Builds on 12 of its 27 references that are in the map. First posted on arXiv 26 Feb 2022.
Builds on
12 of 27 references.
References · 12
- 2017Proximal Policy Optimization Algorithmscited by 14,441
- 2016Semi-Supervised Classification with Graph Convolutional Networkscited by 11,282
- 2017Graph Attention Networkscited by 8,854
- 2016Asynchronous Methods for Deep Reinforcement Learningcited by 2,218
- 2014DeepWalk: Online Learning of Social Representationscited by 1,543
- 2015Convolutional Networks on Graphs for Learning Molecular Fingerprintscited by 751
- 2019Graph Neural Networks for Social Recommendationcited by 711
- 2019What graph neural networks cannot learn: depth vs widthcited by 195
- 2020GCN-RL Circuit Designer: Transferable Transistor Sizing with Graph Neural Networks and Reinforcement Learningcited by 89
- 2020AutoCkt: Deep Reinforcement Learning of Analog Circuit Designscited by 51
- 2022Neural-PIM: Efficient Processing-In-Memory with Neural Approximation of Peripheralscited by 5
- 2019Neural Network-Inspired Analog-to-Digital Conversion to Achieve Super-Resolution with Low-Precision RRAM Devicescited by 3
Built on by
Citing papers per year: 2023: 3; 2024: 2; 2025: 1; 2026: 1.
7 papers.
- 2023CktGNN: Circuit Graph Neural Network for Electronic Design Automationcited by 55
- 2023Risk-Averse Model Uncertainty for Distributionally Robust Safe Reinforcement Learningcited by 12
- 2025FALCON: An ML Framework for Fully Automated Layout-Constrained Analog Circuit Designcited by 4
- 2024CktGen: Automated Analog Circuit Design with Generative Artificial Intelligencecited by 1
- 2024A Benchmark on Directed Graph Representation Learning in Hardware Designscited by 1
- 2023Rethinking the Power of Graph Canonization in Graph Representation Learning with Stabilitycited by 0
- 2026EM-Aware Physical Synthesis: Neural Inductor Modeling and Intelligent Placement & Routing for RF Circuitscited by 0
- 2026EM-Aware Physical Synthesis: Neural Inductor Modeling and Intelligent Placement & Routing for RF Circuits12 Feb 2026
- 2025FALCON: An ML Framework for Fully Automated Layout-Constrained Analog Circuit Design28 May 2025
- 2024A Benchmark on Directed Graph Representation Learning in Hardware Designs9 Oct 2024
- 2024CktGen: Automated Analog Circuit Design with Generative Artificial Intelligence1 Oct 2024
- 2023Rethinking the Power of Graph Canonization in Graph Representation Learning with Stability1 Sep 2023
- 2023CktGNN: Circuit Graph Neural Network for Electronic Design Automation31 Aug 2023
- 2023Risk-Averse Model Uncertainty for Distributionally Robust Safe Reinforcement Learning30 Jan 2023