TicTacBench: Benchmarking Timing Closure Capabilities of Coding Agents
On the map: LLM agents and tool use → Software engineering coding agents
Abstract (arXiv)
Recent advances in large language models (LLMs) have led to the emergence of coding agents capable of performing complex engineering tasks, including register-transfer level (RTL) design and optimization. Existing RTL benchmarks mainly evaluate functional correctness and performance, power, and area (PPA) of the generated RTL designs, leaving agents' ability for timing closure under-evaluated. We propose TicTacBench, a benchmark specifically designed to evaluate coding agents' capabilities for RTL-level timing closure under post-place-and-route (post-PnR) evaluation. TicTacBench contains 30 diverse tasks, each provided with a suboptimal RTL design, realistic timing constraints, functional equivalence verification, and timing reports. With over 300 runs of coding agents driven by 8 frontier LLMs, we find that even the best agent can only close 53.3% of tasks with 7.18% area-delay product (ADP) degradation and 8.83% energy-delay-squared product (EDDP) improvement on average. We identify common failure categories that explain why agents fail to close timing. Then we propose TicTacSkill, a new method that guides agents to follow standard timing-closure procedures and improves the Timing Closure Rate by 9%. These results suggest that while coding agents have made significant progress in RTL design, their timing-closure capability still has substantial room for improvement.
Key facts. No citing papers in the map yet (data through 7 Oct 2026). Placed in Software engineering coding agents, one of 16 directions in LLM agents and tool use. Builds on 18 of its 25 references that are in the map. First posted on arXiv 20 Sep 2026.
Builds on
18 of 25 references.
Closest ancestors · 2
Same direction, newest first
- 2026GLM-5: from Vibe Coding to Agentic Engineering17 Feb
- 2025Comprehensive Verilog Design Problems: A Next-Generation Benchmark Dataset for Evaluating Large Language Models and Agents on RTL Design and Verification17 Jun
Other references · 16
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- 2024RTL-Repo: A Benchmark for Evaluating LLMs on Large-Scale RTL Design Projectscited by 25
- 2025SymRTLO: Enhancing RTL Code Optimization with LLMs and Neuron-Inspired Symbolic Reasoningcited by 16
- 2024E-Syn: E-Graph Rewriting with Technology-Aware Cost Functions for Logic Synthesiscited by 7
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- 2023INVICTUS: Optimizing Boolean Logic Circuit Synthesis via Synergistic Learning and Searchcited by 3
- 2024IR-Aware ECO Timing Optimization Using Reinforcement Learningcited by 3
- 2025ViTAD: Timing Violation-Aware Debugging of RTL Code using Large Language Modelscited by 1
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