mlsanityData to 14 Oct 2026

LACE: Large Language Model Aided Multi-Agent Framework for Agile RISC-V Instruction Extension

arXiv 2608.02915 ↗First posted 3 Aug 2026cs.AR cs.CL cs.SEcited by 0

On the map: LLM agents and tool use → Software engineering coding agents

Abstract (arXiv)

Domain-specific Instruction Set Architecture eXtensions (ISAX) are widely adopted in the RISC-V ecosystem to accelerate emerging workloads, but implementing and validating ISAXes across different cores remains slow and fragmented. Existing frameworks still require per-core interface adaptation, and differential testing often breaks once either the microarchitecture or the ISAX changes. We present LACE, an LLM-aided multi-agent workflow that translates natural-language ISAX intents into a compact two-level IR (operation-level and HDL task-level), performs retrieval-guided localized RTL edits over large repositories, and closes the loop with a compiler-agnostic riscv-formal checking flow (assuming RVFI availability or instrumentation). Across four embedded RISC-V cores, LACE raises pass@1 generation accuracy from near-zero to 72.8% within our evaluation setup, while improving code localization and reducing integration rework. The code of LACE is available at https://github.com/UMN-ZhaoLab/LACE.

Key facts. No citing papers in the map yet (data through 14 Oct 2026). Placed in Software engineering coding agents, one of 16 directions in LLM agents and tool use. Builds on 15 of its 38 references that are in the map. First posted on arXiv 3 Aug 2026.

Builds on

15 of 38 references.

Closest ancestors · 1

Same direction, newest first

  1. 2024OpenHands: An Open Platform for AI Software Developers as Generalist Agents23 Jul

Other references · 14

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  5. 2023CodeT5+: Open Code Large Language Models for Code Understanding and Generationcited by 333
  6. 2023RTLLM: An Open-Source Benchmark for Design RTL Generation with Large Language Modelcited by 148
  7. 2023Chip-Chat: Challenges and Opportunities in Conversational Hardware Designcited by 140
  8. 2023ChipGPT: How far are we from natural language hardware designcited by 105
  9. 2023RTLFixer: Automatically Fixing RTL Syntax Errors with Large Language Modelscited by 100
  10. 2024BetterV: Controlled Verilog Generation with Discriminative Guidancecited by 100
  11. 2023AutoChip: Automating HDL Generation Using LLM Feedbackcited by 83
  12. 2016A near-threshold RISC-V core with DSP extensions for scalable IoT Endpoint Devicescited by 17
2 more
  1. 2024LLM-Aided Compilation for Tensor Acceleratorscited by 8
  2. 2024AGON: Automated Design Framework for Customizing Processors from ISA Documentscited by 1

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