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Late Breaking Results: Breaking Symmetry- Unconventional Placement of Analog Circuits using Multi-Level Multi-Agent Reinforcement Learning

arXiv 2503.22958 ↗First posted 29 Mar 2025cs.AR cs.AIcited by 0

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Abstract (arXiv)

Layout-dependent effects (LDEs) significantly impact analog circuit performance. Traditionally, designers have relied on symmetric placement of circuit components to mitigate variations caused by LDEs. However, due to non-linear nature of these effects, conventional methods often fall short. We propose an objective-driven, multi-level, multi-agent Q-learning framework to explore unconventional design space of analog layout, opening new avenues for optimizing analog circuit performance. Our approach achieves better variation performance than the state-of-the-art layout techniques. Notably, this is the first application of multi-agent RL in analog layout automation. The proposed approach is compared with non-ML approach based on simulated annealing.

Key facts. No citing papers in the map yet (data through 14 Oct 2026). Builds on 1 of its 10 references that are in the map. First posted on arXiv 29 Mar 2025.

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References · 1

  1. 2024Multi-Objective Optimization for Common-Centroid Placement of Analog Transistorscited by 1

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  1. 2026Simulation-Aware In-Context Policy Improvement for LLM-Aided Analog Layout Refinement
  2. 2024Fast ML-driven Analog Circuit Layout using Reinforcement Learning and Steiner Trees
  3. 2026ORACLE: A Multi-Objective Reinforcement Learning-Based Analog Circuit Design Optimizer with Large Language Models-Guided Exploration
  4. 2025AnalogSAGE: Self-evolving Analog Design Multi-Agents with Stratified Memory and Grounded Experience
  5. 2025A Large Language Model-based Multi-Agent Framework for Analog Circuits' Sizing Relationships Extraction
  6. 2026AgenticSizing: A Large Language Model-based Multi-Agent Framework for Analog Circuit Sizing
  7. 2024Automated Placement of Analog Integrated Circuits using Priority-based Constructive Heuristic ↗
  8. 2025Enhancing Reinforcement Learning for the Floorplanning of Analog ICs with Beam Search