mlsanityData to 14 Oct 2026

RollPlace: Improving Macro Placement via Monte Carlo Rollout Search

arXiv 2610.06316 ↗First posted 5 Oct 2026cs.AIcited by 0

On the map: Deep reinforcement learning methods → RL for energy, networks and operations

Abstract (arXiv)

The application of Reinforcement Learning (RL) in Electronic Design Automation (EDA), particularly for chip placement, has attracted considerable attention in recent years. While existing machine learning (ML)-based approaches have achieved notable progress, they predominantly focus on generating optimal layouts in a single attempt, often producing solutions that require subsequent refinement. To address this limitation, we propose RollPlace, a novel and generalized macro placement framework. RollPlace adopts a two-stage optimization strategy: generating initial placement solutions via machine learning methods or heuristic-based strategies, and refining these layouts efficiently by adjusting specific macros derived from the initial stage. This strategy circumvents the sequential generation constraints inherent in traditional RL-based placement methods. Furthermore, RollPlace seamlessly integrates Monte Carlo Tree Search (MCTS) to balance exploration and exploitation, and employs a rollout mechanism for efficient local search. Extensive experiments on the ISPD 2005 benchmark demonstrate that RollPlace outperforms state-of-the-art methods. Additionally, end-to-end experimental results based on OpenROAD across 19 benchmarks show that RollPlace excels in multiple metrics. The proposed framework offers a robust and scalable solution for addressing the growing complexity of modern chip design challenges.

Key facts. No citing papers in the map yet (data through 14 Oct 2026). Placed in RL for energy, networks and operations, one of 15 directions in Deep reinforcement learning methods. Builds on 2 of its 51 references that are in the map. First posted on arXiv 5 Oct 2026.

Builds on

2 of 51 references.

References · 2

  1. 2024Benchmarking End-To-End Performance of AI-Based Chip Placement Algorithmscited by 14
  2. 2020Placement in Integrated Circuits using Cyclic Reinforcement Learning and Simulated Annealingcited by 12

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  1. 2024Chip Placement with Diffusion Models
  2. 2026See it to Place it: Evolving Macro Placements with Vision-Language Models
  3. 2026Component Centric Placement Using Deep Reinforcement Learning
  4. 2024Reinforcement Learning Policy as Macro Regulator Rather than Macro Placer
  5. 2024Non-Overlapping Placement of Macro Cells based on Reinforcement Learning in Chip Design
  6. 2025Enhancing Reinforcement Learning for the Floorplanning of Analog ICs with Beam Search
  7. 2024Fast ML-driven Analog Circuit Layout using Reinforcement Learning and Steiner Trees
  8. 2026PlaceReasoner-Beta: Reasoning-Driven Macro Placement and Benchmarking