LLM for SoC Security: A Paradigm Shift
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Abstract (arXiv)
As the ubiquity and complexity of system-on-chip (SoC) designs increase across electronic devices, the task of incorporating security into an SoC design flow poses significant challenges. Existing security solutions are inadequate to provide effective verification of modern SoC designs due to their limitations in scalability, comprehensiveness, and adaptability. On the other hand, Large Language Models (LLMs) are celebrated for their remarkable success in natural language understanding, advanced reasoning, and program synthesis tasks. Recognizing an opportunity, our research delves into leveraging the emergent capabilities of Generative Pre-trained Transformers (GPTs) to address the existing gaps in SoC security, aiming for a more efficient, scalable, and adaptable methodology. By integrating LLMs into the SoC security verification paradigm, we open a new frontier of possibilities and challenges to ensure the security of increasingly complex SoCs. This paper offers an in-depth analysis of existing works, showcases practical case studies, demonstrates comprehensive experiments, and provides useful promoting guidelines. We also present the achievements, prospects, and challenges of employing LLM in different SoC security verification tasks.
Key facts. Cited by 22 papers in the map (data through 14 Oct 2026). Builds on 140 of its 242 references that are in the map. First posted on arXiv 9 Oct 2023.
Builds on
140 of 242 references.
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- 2025VerilogDB: The Largest, Highest-Quality Dataset with a Preprocessing Framework for LLM-based RTL Generationcited by 8
- 2025ThreatLens: LLM-guided Threat Modeling and Test Plan Generation for Hardware Security Verificationcited by 7
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- 2025BugWhisperer: Fine-Tuning LLMs for SoC Hardware Vulnerability Detectioncited by 5
- 2025Automated Consistency Analysis of LLMscited by 4
- 2024TrojanWhisper: Evaluating Pre-trained LLMs to Detect and Localize Hardware Trojanscited by 2
- 2025RuleGenie: SIEM Detection Rule Set Optimizationcited by 2
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- 2026Cyber Threat Detection and Vulnerability Assessment System using Generative AI and Large Language Model8 Jan 2026
- 2026LAsset: An LLM-assisted Security Asset Identification Framework for System-on-Chip (SoC) Verification6 Jan 2026
- 2025Large Language Models in Cybersecurity: Applications, Vulnerabilities, and Defense Techniques18 Jul 2025
- 2025VerilogDB: The Largest, Highest-Quality Dataset with a Preprocessing Framework for LLM-based RTL Generation9 Jul 2025
- 2025TROJAN-GUARD: Hardware Trojans Detection Using GNN in RTL Designs22 Jun 2025
- 2025BugWhisperer: Fine-Tuning LLMs for SoC Hardware Vulnerability Detection28 May 2025
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- 2025ThreatLens: LLM-guided Threat Modeling and Test Plan Generation for Hardware Security Verification11 May 2025
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- 2025VeriDebug: A Unified LLM for Verilog Debugging via Contrastive Embedding and Guided Correction27 Apr 2025
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