NAAS: Neural Accelerator Architecture Search
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Abstract (arXiv)
Data-driven, automatic design space exploration of neural accelerator architecture is desirable for specialization and productivity. Previous frameworks focus on sizing the numerical architectural hyper-parameters while neglect searching the PE connectivities and compiler mappings. To tackle this challenge, we propose Neural Accelerator Architecture Search (NAAS) which holistically searches the neural network architecture, accelerator architecture, and compiler mapping in one optimization loop. NAAS composes highly matched architectures together with efficient mapping. As a data-driven approach, NAAS rivals the human design Eyeriss by 4.4x EDP reduction with 2.7% accuracy improvement on ImageNet under the same computation resource, and offers 1.4x to 3.5x EDP reduction than only sizing the architectural hyper-parameters.
Key facts. Cited by 24 papers in the map (data through 7 Oct 2026). Builds on 15 of its 31 references that are in the map. First posted on arXiv 27 May 2021.
Builds on
15 of 31 references.
References · 15
- 2019EfficientNet: Rethinking Model Scaling for Convolutional Neural Networkscited by 6,415
- 2016Neural Architecture Search with Reinforcement Learningcited by 1,489
- 2019Energy and Policy Considerations for Deep Learning in NLPcited by 1,242
- 2019Once-for-All: Train One Network and Specialize it for Efficient Deploymentcited by 778
- 2018ProxylessNAS: Direct Neural Architecture Search on Target Task and Hardwarecited by 666
- 2018HAQ: Hardware-Aware Automated Quantization with Mixed Precisioncited by 426
- 2019Single Path One-Shot Neural Architecture Search with Uniform Samplingcited by 411
- 2018Learning to Optimize Tensor Programscited by 138
- 2019Hardware/Software Co-Exploration of Neural Architecturescited by 50
- 2019FPGA/DNN Co-Design: An Efficient Design Methodology for IoT Intelligence on the Edgecited by 48
- 2020Co-Exploration of Neural Architectures and Heterogeneous ASIC Accelerator Designs Targeting Multiple Taskscited by 43
- 2020EDD: Efficient Differentiable DNN Architecture and Implementation Co-search for Embedded AI Solutionscited by 35
3 more
- 2020ConfuciuX: Autonomous Hardware Resource Assignment for DNN Accelerators using Reinforcement Learningcited by 35
- 2019SkyNet: a Hardware-Efficient Method for Object Detection and Tracking on Embedded Systemscited by 26
- 2019On Neural Architecture Search for Resource-Constrained Hardware Platformscited by 18
Built on by
Citing papers per year: 2021: 1; 2022: 7; 2023: 6; 2024: 4; 2025: 3; 2026: 3.
24 papers.
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- 2022Enable Deep Learning on Mobile Devices: Methods, Systems, and Applicationscited by 32
- 2023Mobile Foundation Model as Firmwarecited by 25
- 2023AccelTran: A Sparsity-Aware Accelerator for Dynamic Inference with Transformerscited by 24
- 2023A Survey on Graph Neural Network Acceleration: Algorithms, Systems, and Customized Hardwarecited by 18
- 2025CATransformers: Carbon Aware Transformers Through Joint Model-Hardware Optimizationcited by 7
- 2022Special Session: Towards an Agile Design Methodology for Efficient, Reliable, and Secure ML Systemscited by 6
- 2022CODEBench: A Neural Architecture and Hardware Accelerator Co-Design Frameworkcited by 5
- 2025DOSA: Differentiable Model-Based One-Loop Search for DNN Acceleratorscited by 4
- 2021Algorithm and Hardware Co-design for Reconfigurable CNN Acceleratorcited by 2
- 2023EdgeTran: Co-designing Transformers for Efficient Inference on Mobile Edge Platformscited by 2
- 2022A Semi-Decoupled Approach to Fast and Optimal Hardware-Software Co-Design of Neural Acceleratorscited by 1
- 2022GANDSE: Generative Adversarial Network based Design Space Exploration for Neural Network Accelerator Designcited by 1
12 more
- 2023TransCODE: Co-design of Transformers and Accelerators for Efficient Training and Inferencecited by 1
- 2024ShiftAddAug: Augment Multiplication-Free Tiny Neural Network with Hybrid Computationcited by 1
- 2024Combining Neural Architecture Search and Automatic Code Optimization: A Surveycited by 1
- 2024NASH: Neural Architecture and Accelerator Search for Multiplication-Reduced Hybrid Modelscited by 1
- 2025LEGO: Spatial Accelerator Generation and Optimization for Tensor Applicationscited by 1
- 2022DRAGON (Differentiable Graph Execution) : A suite of Hardware Simulation and Optimization tools for Modern AI/Non-AI Workloadscited by 0
- 2022SONAR: Joint Architecture and System Optimization Searchcited by 0
- 2023Enabling Hard Constraints in Differentiable Neural Network and Accelerator Co-Explorationcited by 0
- 2024Exploring Quantization and Mapping Synergy in Hardware-Aware Deep Neural Network Acceleratorscited by 0
- 2026HERCULES: Hardware-Efficient, Robust, Continual Learning Neural Architecture Searchcited by 0
- 2026Uncertainty-Aware End-to-End Co-Design of Neural Network Processors: From Training and Mapping to Fabricationcited by 0
- 2026NAS-Driven Hardware Accelerator Exploration for Edge AI and Quantization Effects on the Pareto Spacecited by 0
- 2026NAS-Driven Hardware Accelerator Exploration for Edge AI and Quantization Effects on the Pareto Space13 Aug 2026
- 2026Uncertainty-Aware End-to-End Co-Design of Neural Network Processors: From Training and Mapping to Fabrication3 Jun 2026
- 2026HERCULES: Hardware-Efficient, Robust, Continual Learning Neural Architecture Search3 May 2026
- 2025LEGO: Spatial Accelerator Generation and Optimization for Tensor Applications15 Sep 2025
- 2025DOSA: Differentiable Model-Based One-Loop Search for DNN Accelerators12 Sep 2025
- 2025CATransformers: Carbon Aware Transformers Through Joint Model-Hardware Optimization2 May 2025
- 2024NASH: Neural Architecture and Accelerator Search for Multiplication-Reduced Hybrid Models7 Sep 2024
- 2024Combining Neural Architecture Search and Automatic Code Optimization: A Survey7 Aug 2024
- 2024ShiftAddAug: Augment Multiplication-Free Tiny Neural Network with Hybrid Computation3 Jul 2024
- 2024Exploring Quantization and Mapping Synergy in Hardware-Aware Deep Neural Network Accelerators8 Apr 2024
- 2023Mobile Foundation Model as Firmware28 Aug 2023
- 2023A Survey on Graph Neural Network Acceleration: Algorithms, Systems, and Customized Hardware24 Jun 2023
12 more
- 2023TransCODE: Co-design of Transformers and Accelerators for Efficient Training and Inference27 Mar 2023
- 2023EdgeTran: Co-designing Transformers for Efficient Inference on Mobile Edge Platforms24 Mar 2023
- 2023AccelTran: A Sparsity-Aware Accelerator for Dynamic Inference with Transformers28 Feb 2023
- 2023Enabling Hard Constraints in Differentiable Neural Network and Accelerator Co-Exploration23 Jan 2023
- 2022CODEBench: A Neural Architecture and Hardware Accelerator Co-Design Framework7 Dec 2022
- 2022SONAR: Joint Architecture and System Optimization Search25 Aug 2022
- 2022GANDSE: Generative Adversarial Network based Design Space Exploration for Neural Network Accelerator Design1 Aug 2022
- 2022Enable Deep Learning on Mobile Devices: Methods, Systems, and Applications25 Apr 2022
- 2022Special Session: Towards an Agile Design Methodology for Efficient, Reliable, and Secure ML Systems18 Apr 2022
- 2022DRAGON (Differentiable Graph Execution) : A suite of Hardware Simulation and Optimization tools for Modern AI/Non-AI Workloads13 Apr 2022
- 2022A Semi-Decoupled Approach to Fast and Optimal Hardware-Software Co-Design of Neural Accelerators25 Mar 2022
- 2021Algorithm and Hardware Co-design for Reconfigurable CNN Accelerator24 Nov 2021
- 2022Enable Deep Learning on Mobile Devices: Methods, Systems, and Applicationscited by 32
- 2023Mobile Foundation Model as Firmwarecited by 25
- 2023AccelTran: A Sparsity-Aware Accelerator for Dynamic Inference with Transformerscited by 24
- 2023A Survey on Graph Neural Network Acceleration: Algorithms, Systems, and Customized Hardwarecited by 18
- 2025CATransformers: Carbon Aware Transformers Through Joint Model-Hardware Optimizationcited by 7
- 2022Special Session: Towards an Agile Design Methodology for Efficient, Reliable, and Secure ML Systemscited by 6
- 2022CODEBench: A Neural Architecture and Hardware Accelerator Co-Design Frameworkcited by 5
- 2025DOSA: Differentiable Model-Based One-Loop Search for DNN Acceleratorscited by 4
- 2021Algorithm and Hardware Co-design for Reconfigurable CNN Acceleratorcited by 2
- 2023EdgeTran: Co-designing Transformers for Efficient Inference on Mobile Edge Platformscited by 2
- 2022A Semi-Decoupled Approach to Fast and Optimal Hardware-Software Co-Design of Neural Acceleratorscited by 1
- 2022GANDSE: Generative Adversarial Network based Design Space Exploration for Neural Network Accelerator Designcited by 1
12 most cited of 24 All 24 (JSON)
- 2026NAS-Driven Hardware Accelerator Exploration for Edge AI and Quantization Effects on the Pareto Space13 Aug 2026
- 2026Uncertainty-Aware End-to-End Co-Design of Neural Network Processors: From Training and Mapping to Fabrication3 Jun 2026
- 2026HERCULES: Hardware-Efficient, Robust, Continual Learning Neural Architecture Search3 May 2026
- 2025LEGO: Spatial Accelerator Generation and Optimization for Tensor Applications15 Sep 2025
- 2025DOSA: Differentiable Model-Based One-Loop Search for DNN Accelerators12 Sep 2025
- 2025CATransformers: Carbon Aware Transformers Through Joint Model-Hardware Optimization2 May 2025
- 2024NASH: Neural Architecture and Accelerator Search for Multiplication-Reduced Hybrid Models7 Sep 2024
- 2024Combining Neural Architecture Search and Automatic Code Optimization: A Survey7 Aug 2024
- 2024ShiftAddAug: Augment Multiplication-Free Tiny Neural Network with Hybrid Computation3 Jul 2024
- 2024Exploring Quantization and Mapping Synergy in Hardware-Aware Deep Neural Network Accelerators8 Apr 2024
- 2023Mobile Foundation Model as Firmware28 Aug 2023
- 2023A Survey on Graph Neural Network Acceleration: Algorithms, Systems, and Customized Hardware24 Jun 2023
12 newest of 24 All 24 (JSON)