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Enabling Hard Constraints in Differentiable Neural Network and Accelerator Co-Exploration

arXiv 2301.09312 ↗First posted 23 Jan 2023cs.LG cs.ARcited by 0

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Abstract (arXiv)

Co-exploration of an optimal neural architecture and its hardware accelerator is an approach of rising interest which addresses the computational cost problem, especially in low-profile systems. The large co-exploration space is often handled by adopting the idea of differentiable neural architecture search. However, despite the superior search efficiency of the differentiable co-exploration, it faces a critical challenge of not being able to systematically satisfy hard constraints such as frame rate. To handle the hard constraint problem of differentiable co-exploration, we propose HDX, which searches for hard-constrained solutions without compromising the global design objectives. By manipulating the gradients in the interest of the given hard constraint, high-quality solutions satisfying the constraint can be obtained.

Key facts. No citing papers in the map yet (data through 14 Oct 2026). Builds on 22 of its 32 references that are in the map. First posted on arXiv 23 Jan 2023.

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22 of 32 references.

References · 22

  1. 2015You Only Look Once: Unified, Real-Time Object Detectioncited by 4,852
  2. 2018MobileNetV2: Inverted Residuals and Linear Bottleneckscited by 4,795
  3. 2018DARTS: Differentiable Architecture Searchcited by 1,798
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  5. 2018ProxylessNAS: Direct Neural Architecture Search on Target Task and Hardwarecited by 673
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  7. 2016DoReFa-Net: Training Low Bitwidth Convolutional Neural Networks with Low Bitwidth Gradientscited by 569
  8. 2021Gradient Projection Memory for Continual Learningcited by 348
  9. 2019FPGA/DNN Co-Design: An Efficient Design Methodology for IoT Intelligence on the Edgecited by 48
  10. 2020DPM: A Novel Training Method for Physics-Informed Neural Networks in Extrapolationcited by 45
  11. 2020Co-Exploration of Neural Architectures and Heterogeneous ASIC Accelerator Designs Targeting Multiple Taskscited by 43
  12. 2019Accuracy vs. Efficiency: Achieving Both through FPGA-Implementation Aware Neural Architecture Searchcited by 38
10 more
  1. 2020EDD: Efficient Differentiable DNN Architecture and Implementation Co-search for Embedded AI Solutionscited by 36
  2. 2020Best of Both Worlds: AutoML Codesign of a CNN and its Hardware Acceleratorcited by 30
  3. 2020Accelerator-aware Neural Network Design using AutoMLcited by 30
  4. 2021NAAS: Neural Accelerator Architecture Searchcited by 24
  5. 2020TF-NAS: Rethinking Three Search Freedoms of Latency-Constrained Differentiable Neural Architecture Searchcited by 21
  6. 2021HardCoRe-NAS: Hard Constrained diffeRentiable Neural Architecture Searchcited by 20
  7. 2019On Neural Architecture Search for Resource-Constrained Hardware Platformscited by 18
  8. 2020AOWS: Adaptive and optimal network width search with latency constraintscited by 17
  9. 2020DANCE: Differentiable Accelerator/Network Co-Explorationcited by 16
  10. 2021Auto-NBA: Efficient and Effective Search Over the Joint Space of Networks, Bitwidths, and Acceleratorscited by 12

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