PrefixAgent: An LLM-Powered Design Framework for Efficient Prefix Adder Optimization
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Abstract (arXiv)
Prefix adders are fundamental arithmetic circuits, but their design space grows exponentially with bit-width, posing significant optimization challenges. Previous works face limitations in performance, generalization, and scalability. To address these challenges, we propose PrefixAgent, an LLM-powered framework that enables efficient prefix adder optimization. Firstly, we reformulate the problem into two subtasks, namely backbone synthesis and structure refinement, which effectively reduce the search space. The LLM performs these two phases of optimization by invoking tools through function calls, enabling it to iteratively construct the backbone and refine local structures based on reasoning and EDA feedback. Secondly, this new design perspective allows us to systematically collect large-scale, high-quality supervision data. We leverage the rewriting and equality saturation capabilities of e-graphs to comprehensively explore the prefix adder solution space. In addition, the explainability of e-graphs enables us to extract fine-grained rewrite trajectories, which serve as interpretable and effective training data. PrefixAgent is then fine-tuned on this dataset, significantly enhancing its optimization ability and reasoning generalization. Experimental results show that PrefixAgent synthesizes prefix adders with smaller areas than baseline methods in nearly all configurations, with the advantage growing at larger bit-widths, and it remains effective under a commercial EDA flow.
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References · 24
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12 more
- 2024GraphWiz: An Instruction-Following Language Model for Graph Problemscited by 32
- 2024How Do Large Language Models Understand Graph Patterns? A Benchmark for Graph Pattern Comprehensioncited by 30
- 2022PrefixRL: Optimization of Parallel Prefix Circuits using Deep Reinforcement Learningcited by 18
- 2024Scalable and Effective Arithmetic Tree Generation for Adder and Multiplier Designscited by 9
- 2018Cross-layer Optimization for High Speed Adders: A Pareto Driven Machine Learning Approachcited by 7
- 2024E-Syn: E-Graph Rewriting with Technology-Aware Cost Functions for Logic Synthesiscited by 7
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- 2023Multiplier Optimization via E-Graph Rewritingcited by 1
- 2024RL-MUL 2.0: Multiplier Design Optimization with Parallel Deep Reinforcement Learning and Space Reductioncited by 1
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