mlsanityData to 14 Oct 2026

FPGA-based Acceleration for Convolutional Neural Networks: A Comprehensive Review

arXiv 2505.13461 ↗First posted 4 May 2025cs.LG cs.ARcited by 1

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Abstract (arXiv)

Convolutional Neural Networks (CNNs) are fundamental to deep learning, driving applications across various domains. However, their growing complexity has significantly increased computational demands, necessitating efficient hardware accelerators. Field-Programmable Gate Arrays (FPGAs) have emerged as a leading solution, offering reconfigurability, parallelism, and energy efficiency. This paper provides a comprehensive review of FPGA-based hardware accelerators specifically designed for CNNs. It presents and summarizes the performance evaluation framework grounded in existing studies and explores key optimization strategies, such as parallel computing, dataflow optimization, and hardware-software co-design. It also compares various FPGA architectures in terms of latency, throughput, compute efficiency, power consumption, and resource utilization. Finally, the paper highlights future challenges and opportunities, emphasizing the potential for continued innovation in this field.

Key facts. Cited by 1 paper in the map (data through 14 Oct 2026). Builds on 39 of its 109 references that are in the map. First posted on arXiv 4 May 2025.

Builds on

39 of 109 references.

References · 39

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27 more
  1. 2023Run, Don't Walk: Chasing Higher FLOPS for Faster Neural Networkscited by 130
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Cited by year (2026 to 14 Oct)

Citing papers per year: 2026: 1.

1 paper.

  1. 2026Towards Autonomous Accelerator Design: FPGA Accelerator Generation with SECDAcited by 1