SAMO: Optimised Mapping of Convolutional Neural Networks to Streaming Architectures
Not on the map. Why?
Abstract (arXiv)
Significant effort has been placed on the development of toolflows that map Convolutional Neural Network (CNN) models to Field Programmable Gate Arrays (FPGAs) with the aim of automating the production of high performing designs for a diverse set of applications. However, within these toolflows, the problem of finding an optimal mapping is often overlooked, with the expectation that the end user will tune their generated hardware for their desired platform. This is particularly prominent within Streaming Architecture toolflows, where there is a large design space to explore . In this work, we establish the framework SAMO: a Streaming Architecture Mapping Optimiser. SAMO exploits the structure of CNN models and the common features that exist in Streaming Architectures, and casts the mapping optimisation problem under a unified methodology. Furthermore, SAMO explicitly explores the reconfigurability property of FPGAs, allowing the methodology to overcome mapping limitations imposed by certain toolflows under resource-constrained scenarios, as well as improve on the achievable throughput. Three optimisation methods - Brute-Force, Simulated Annealing and Rule-Based - have been developed in order to generate valid, high performance designs for a range of target platforms and CNN models. Results show that SAMO-optimised designs can achieve 4-20x better performance compared to existing hand-tuned designs. The SAMO framework is open-source: https://github.com/AlexMontgomerie/samo.
Key facts. Cited by 5 papers in the map (data through 7 Oct 2026). First posted on arXiv 30 Nov 2021.
Builds on
No reference list yet.
Built on by
Citing papers per year: 2023: 3; 2024: 1; 2025: 1.
5 papers.
- 2023SATAY: A Streaming Architecture Toolflow for Accelerating YOLO Models on FPGA Devicescited by 4
- 2023ATHEENA: A Toolflow for Hardware Early-Exit Network Automationcited by 3
- 2025FPGA-based Acceleration for Convolutional Neural Networks: A Comprehensive Reviewcited by 1
- 2023Mixed-TD: Efficient Neural Network Accelerator with Layer-Specific Tensor Decompositioncited by 0
- 2024SMOF: Streaming Modern CNNs on FPGAs with Smart Off-Chip Evictioncited by 0
- 2025FPGA-based Acceleration for Convolutional Neural Networks: A Comprehensive Review4 May 2025
- 2024SMOF: Streaming Modern CNNs on FPGAs with Smart Off-Chip Eviction27 Mar 2024
- 2023SATAY: A Streaming Architecture Toolflow for Accelerating YOLO Models on FPGA Devices4 Sep 2023
- 2023Mixed-TD: Efficient Neural Network Accelerator with Layer-Specific Tensor Decomposition8 Jun 2023
- 2023ATHEENA: A Toolflow for Hardware Early-Exit Network Automation17 Apr 2023