mlsanityData to 14 Oct 2026

U-SWIM: Universal Selective Write-Verify for Computing-in-Memory Neural Accelerators

arXiv 2401.05357 ↗First posted 11 Dec 2023cs.AR cs.LGcited by 0

Not on the map. Why?

Abstract (arXiv)

Architectures that incorporate Computing-in-Memory (CiM) using emerging non-volatile memory (NVM) devices have become strong contenders for deep neural network (DNN) acceleration due to their impressive energy efficiency. Yet, a significant challenge arises when using these emerging devices: they can show substantial variations during the weight-mapping process. This can severely impact DNN accuracy if not mitigated. A widely accepted remedy for imperfect weight mapping is the iterative write-verify approach, which involves verifying conductance values and adjusting devices if needed. In all existing publications, this procedure is applied to every individual device, resulting in a significant programming time overhead. In our research, we illustrate that only a small fraction of weights need this write-verify treatment for the corresponding devices and the DNN accuracy can be preserved, yielding a notable programming acceleration. Building on this, we introduce USWIM, a novel method based on the second derivative. It leverages a single iteration of forward and backpropagation to pinpoint the weights demanding write-verify. Through extensive tests on diverse DNN designs and datasets, USWIM manifests up to a 10x programming acceleration against the traditional exhaustive write-verify method, all while maintaining a similar accuracy level. Furthermore, compared to our earlier SWIM technique, USWIM excels, showing a 7x speedup when dealing with devices exhibiting non-uniform variations.

Key facts. No citing papers in the map yet (data through 14 Oct 2026). Builds on 16 of its 36 references that are in the map. First posted on arXiv 11 Dec 2023.

Builds on

16 of 36 references.

References · 16

  1. 2015Deep Residual Learning for Image Recognitioncited by 52,096
  2. 2017Efficient Processing of Deep Neural Networks: A Tutorial and Surveycited by 434
  3. 2020Co-Exploration of Neural Architectures and Heterogeneous ASIC Accelerator Designs Targeting Multiple Taskscited by 43
  4. 2023Hardware-aware training for large-scale and diverse deep learning inference workloads using in-memory computing-based acceleratorscited by 43
  5. 2019Device-Circuit-Architecture Co-Exploration for Computing-in-Memory Neural Acceleratorscited by 32
  6. 2022The Larger The Fairer? Small Neural Networks Can Achieve Fairness for Edge Devicescited by 21
  7. 2021Uncertainty Modeling of Emerging Device-based Computing-in-Memory Neural Accelerators with Application to Neural Architecture Searchcited by 17
  8. 2022SWIM: Selective Write-Verify for Computing-in-Memory Neural Acceleratorscited by 16
  9. 2019When Single Event Upset Meets Deep Neural Networks: Observations, Explorations, and Remediescited by 15
  10. 2021Can Noise on Qubits Be Learned in Quantum Neural Network? A Case Study on QuantumFlowcited by 13
  11. 2022Computing-In-Memory Neural Network Accelerators for Safety-Critical Systems: Can Small Device Variations Be Disastrous?cited by 12
  12. 2021Exploration of Quantum Neural Architecture by Mixing Quantum Neuron Designscited by 11
4 more
  1. 2021RADARS: Memory Efficient Reinforcement Learning Aided Differentiable Neural Architecture Searchcited by 8
  2. 2023Improving Realistic Worst-Case Performance of NVCiM DNN Accelerators through Training with Right-Censored Gaussian Noisecited by 8
  3. 2023Muffin: A Framework Toward Multi-Dimension AI Fairness by Uniting Off-the-Shelf Modelscited by 8
  4. 2023Gradient descent-based programming of analog in-memory computing corescited by 2

Built on by

Not cited yet.