Improving Realistic Worst-Case Performance of NVCiM DNN Accelerators through Training with Right-Censored Gaussian Noise
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Abstract (arXiv)
Compute-in-Memory (CiM), built upon non-volatile memory (NVM) devices, is promising for accelerating deep neural networks (DNNs) owing to its in-situ data processing capability and superior energy efficiency. Unfortunately, the well-trained model parameters, after being mapped to NVM devices, can often exhibit large deviations from their intended values due to device variations, resulting in notable performance degradation in these CiM-based DNN accelerators. There exists a long list of solutions to address this issue. However, they mainly focus on improving the mean performance of CiM DNN accelerators. How to guarantee the worst-case performance under the impact of device variations, which is crucial for many safety-critical applications such as self-driving cars, has been far less explored. In this work, we propose to use the k-th percentile performance (KPP) to capture the realistic worst-case performance of DNN models executing on CiM accelerators. Through a formal analysis of the properties of KPP and the noise injection-based DNN training, we demonstrate that injecting a novel right-censored Gaussian noise, as opposed to the conventional Gaussian noise, significantly improves the KPP of DNNs. We further propose an automated method to determine the optimal hyperparameters for injecting this right-censored Gaussian noise during the training process. Our method achieves up to a 26% improvement in KPP compared to the state-of-the-art methods employed to enhance DNN robustness under the impact of device variations.
Key facts. Cited by 8 papers in the map (data through 14 Oct 2026). Builds on 13 of its 31 references that are in the map. First posted on arXiv 29 Jul 2023.
Builds on
13 of 31 references.
References · 13
- 2015Deep Residual Learning for Image Recognitioncited by 52,096
- 2020Language Models are Few-Shot Learnerscited by 32,419
- 2014Very Deep Convolutional Networks for Large-Scale Image Recognitioncited by 15,364
- 2021Zero-Shot Text-to-Image Generationcited by 4,288
- 2019BackPACK: Packing more into backpropcited by 78
- 2019Device-Circuit-Architecture Co-Exploration for Computing-in-Memory Neural Acceleratorscited by 32
- 2021Formalizing Generalization and Robustness of Neural Networks to Weight Perturbationscited by 22
- 2021Uncertainty Modeling of Emerging Device-based Computing-in-Memory Neural Accelerators with Application to Neural Architecture Searchcited by 17
- 2022SWIM: Selective Write-Verify for Computing-in-Memory Neural Acceleratorscited by 16
- 2019When Single Event Upset Meets Deep Neural Networks: Observations, Explorations, and Remediescited by 15
- 2022Computing-In-Memory Neural Network Accelerators for Safety-Critical Systems: Can Small Device Variations Be Disastrous?cited by 12
- 2022CorrectNet: Robustness Enhancement of Analog In-Memory Computing for Neural Networks by Error Suppression and Compensationcited by 9
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Citing papers per year: 2023: 3; 2024: 2; 2025: 1; 2026: 2.
8 papers.
- 2023MaxK-GNN: Extremely Fast GPU Kernel Design for Accelerating Graph Neural Networks Trainingcited by 25
- 2024Robust Implementation of Retrieval-Augmented Generation on Edge-based Computing-in-Memory Architecturescited by 12
- 2025Revisiting Outage for Edge Inference Systemscited by 5
- 2023Compute-in-Memory based Neural Network Accelerators for Safety-Critical Systems: Worst-Case Scenarios and Protectionscited by 3
- 2024Zero-Space Cost Fault Tolerance for Transformer-based Language Models on ReRAMcited by 2
- 2026When Small Variations Become Big Failures: Reliability Challenges in Compute-in-Memory Neural Acceleratorscited by 1
- 2023U-SWIM: Universal Selective Write-Verify for Computing-in-Memory Neural Acceleratorscited by 0
- 2026Interface-Aware KV Cache Quantization for Dense On-Chip NVM in Long-Context LLM Decodingcited by 0
- 2026Interface-Aware KV Cache Quantization for Dense On-Chip NVM in Long-Context LLM Decoding4 Sep 2026
- 2026When Small Variations Become Big Failures: Reliability Challenges in Compute-in-Memory Neural Accelerators3 Mar 2026
- 2025Revisiting Outage for Edge Inference Systems22 Mar 2025
- 2024Robust Implementation of Retrieval-Augmented Generation on Edge-based Computing-in-Memory Architectures7 May 2024
- 2024Zero-Space Cost Fault Tolerance for Transformer-based Language Models on ReRAM22 Jan 2024
- 2023MaxK-GNN: Extremely Fast GPU Kernel Design for Accelerating Graph Neural Networks Training14 Dec 2023
- 2023U-SWIM: Universal Selective Write-Verify for Computing-in-Memory Neural Accelerators11 Dec 2023
- 2023Compute-in-Memory based Neural Network Accelerators for Safety-Critical Systems: Worst-Case Scenarios and Protections11 Dec 2023