Using the IBM Analog In-Memory Hardware Acceleration Kit for Neural Network Training and Inference
Not on the map. Why?
Abstract (arXiv)
Analog In-Memory Computing (AIMC) is a promising approach to reduce the latency and energy consumption of Deep Neural Network (DNN) inference and training. However, the noisy and non-linear device characteristics, and the non-ideal peripheral circuitry in AIMC chips, require adapting DNNs to be deployed on such hardware to achieve equivalent accuracy to digital computing. In this tutorial, we provide a deep dive into how such adaptations can be achieved and evaluated using the recently released IBM Analog Hardware Acceleration Kit (AIHWKit), freely available at https://github.com/IBM/aihwkit. The AIHWKit is a Python library that simulates inference and training of DNNs using AIMC. We present an in-depth description of the AIHWKit design, functionality, and best practices to properly perform inference and training. We also present an overview of the Analog AI Cloud Composer, a platform that provides the benefits of using the AIHWKit simulation in a fully managed cloud setting along with physical AIMC hardware access, freely available at https://aihw-composer.draco.res.ibm.com. Finally, we show examples on how users can expand and customize AIHWKit for their own needs. This tutorial is accompanied by comprehensive Jupyter Notebook code examples that can be run using AIHWKit, which can be downloaded from https://github.com/IBM/aihwkit/tree/master/notebooks/tutorial.
Key facts. Cited by 10 papers in the map (data through 7 Oct 2026). Builds on 13 of its 75 references that are in the map. First posted on arXiv 18 Jul 2023.
Builds on
13 of 75 references.
References · 13
- 2019PyTorch: An Imperative Style, High-Performance Deep Learning Librarycited by 20,160
- 2019fairseq: A Fast, Extensible Toolkit for Sequence Modelingcited by 1,486
- 2019PUMA: A Programmable Ultra-efficient Memristor-based Accelerator for Machine Learning Inferencecited by 57
- 2023Hardware-aware training for large-scale and diverse deep learning inference workloads using in-memory computing-based acceleratorscited by 42
- 2021A flexible and fast PyTorch toolkit for simulating training and inference on analog crossbar arrayscited by 38
- 2020DNN+NeuroSim V2.0: An End-to-End Benchmarking Framework for Compute-in-Memory Accelerators for On-chip Trainingcited by 32
- 2016Acceleration of Deep Neural Network Training with Resistive Cross-Point Devicescited by 28
- 2019Algorithm for Training Neural Networks on Resistive Device Arrayscited by 18
- 2017Training Deep Convolutional Neural Networks with Resistive Cross-Point Devicescited by 17
- 2023Fast offset corrected in-memory trainingcited by 11
- 2023AnalogNAS: A Neural Network Design Framework for Accurate Inference with Analog In-Memory Computingcited by 10
- 2019Zero-shifting Technique for Deep Neural Network Training on Resistive Cross-point Arrayscited by 7
1 more
Built on by
Citing papers per year: 2024: 2; 2025: 6; 2026: 2.
10 papers.
- 2025Analog Foundation Modelscited by 3
- 2025NeuroSim V1.5: Improved Software Backbone for Benchmarking Compute-in-Memory Accelerators with Device and Circuit-level Non-idealitiescited by 2
- 2024Efficient transformer adaptation for analog in-memory computing via low-rank adapterscited by 1
- 2025Assessing the Performance of Analog Training for Transfer Learningcited by 1
- 2025Rapid yet accurate Tile-circuit and device modeling for Analog In-Memory Computingcited by 1
- 2025AnalogNAS-Bench: A NAS Benchmark for Analog In-Memory Computingcited by 1
- 2025Memristor-Based Neural Network Accelerators for Space Applications: Enhancing Performance with Temporal Averaging and SIRENscited by 1
- 2024Kernel Approximation using Analog In-Memory Computingcited by 0
- 2026Architectural Design and Performance Analysis of FPGA based AI Accelerators: A Comprehensive Reviewcited by 0
- 2026ChatNeuroSim: An LLM Agent Framework for Automated Compute-in-Memory Accelerator Deployment and Optimizationcited by 0
- 2026ChatNeuroSim: An LLM Agent Framework for Automated Compute-in-Memory Accelerator Deployment and Optimization4 Mar 2026
- 2026Architectural Design and Performance Analysis of FPGA based AI Accelerators: A Comprehensive Review25 Feb 2026
- 2025Memristor-Based Neural Network Accelerators for Space Applications: Enhancing Performance with Temporal Averaging and SIRENs2 Sep 2025
- 2025AnalogNAS-Bench: A NAS Benchmark for Analog In-Memory Computing23 Jun 2025
- 2025Assessing the Performance of Analog Training for Transfer Learning16 May 2025
- 2025Analog Foundation Models14 May 2025
- 2025Rapid yet accurate Tile-circuit and device modeling for Analog In-Memory Computing5 May 2025
- 2025NeuroSim V1.5: Improved Software Backbone for Benchmarking Compute-in-Memory Accelerators with Device and Circuit-level Non-idealities5 May 2025
- 2024Efficient transformer adaptation for analog in-memory computing via low-rank adapters26 Nov 2024
- 2024Kernel Approximation using Analog In-Memory Computing5 Nov 2024