mlsanityData to 14 Oct 2026

NeuroSim V1.5: Improved Software Backbone for Benchmarking Compute-in-Memory Accelerators with Device and Circuit-level Non-idealities

arXiv 2505.02314 ↗First posted 5 May 2025cs.AR cs.AI cs.LGcited by 2

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Abstract (arXiv)

The exponential growth of artificial intelligence (AI) applications has exposed the inefficiency of conventional von Neumann architectures, where frequent data transfers between compute units and memory create significant energy and latency bottlenecks. Analog Computing-in-Memory (ACIM) addresses this challenge by performing multiply-accumulate (MAC) operations directly in the memory arrays, substantially reducing data movement. However, designing robust ACIM accelerators requires accurate modeling of device- and circuit-level non-idealities. In this work, we present NeuroSim V1.5, introducing several key advances: (1) seamless integration with TensorRT's post-training quantization flow enabling support for more neural networks including transformers, (2) a flexible noise injection methodology built on pre-characterized statistical models, making it straightforward to incorporate data from SPICE simulations or silicon measurements, (3) expanded device support including emerging non-volatile capacitive memories, and (4) up to 6.5x faster runtime than NeuroSim V1.4 through optimized behavioral simulation. The combination of these capabilities uniquely enables systematic design space exploration across both accuracy and hardware efficiency metrics. Through multiple case studies, we demonstrate optimization of critical design parameters while maintaining network accuracy. By bridging high-fidelity noise modeling with efficient simulation, NeuroSim V1.5 advances the design and validation of next-generation ACIM accelerators. All NeuroSim versions are available open-source at https://github.com/neurosim/NeuroSim.

Key facts. Cited by 2 papers in the map (data through 14 Oct 2026). Builds on 16 of its 84 references that are in the map. First posted on arXiv 5 May 2025.

Builds on

16 of 84 references.

References · 16

  1. 2021Swin Transformer: Hierarchical Vision Transformer using Shifted Windowscited by 12,139
  2. 2016DoReFa-Net: Training Low Bitwidth Convolutional Neural Networks with Low Bitwidth Gradientscited by 569
  3. 2021I-BERT: Integer-only BERT Quantizationcited by 255
  4. 2022I-ViT: Integer-only Quantization for Efficient Vision Transformer Inferencecited by 95
  5. 2018Training and Inference with Integers in Deep Neural Networkscited by 86
  6. 2021A flexible and fast PyTorch toolkit for simulating training and inference on analog crossbar arrayscited by 39
  7. 2020DNN+NeuroSim V2.0: An End-to-End Benchmarking Framework for Compute-in-Memory Accelerators for On-chip Trainingcited by 33
  8. 2024Measuring the Energy Consumption and Efficiency of Deep Neural Networks: An Empirical Analysis and Design Recommendationscited by 12
  9. 2023Using the IBM Analog In-Memory Hardware Acceleration Kit for Neural Network Training and Inferencecited by 11
  10. 2021On the Accuracy of Analog Neural Network Inference Acceleratorscited by 10
  11. 2024CiMLoop: A Flexible, Accurate, and Fast Compute-In-Memory Modeling Toolcited by 10
  12. 2023RAELLA: Reforming the Arithmetic for Efficient, Low-Resolution, and Low-Loss Analog PIM: No Retraining Required!cited by 9
4 more
  1. 2021AnalogNets: ML-HW Co-Design of Noise-robust TinyML Models and Always-On Analog Compute-in-Memory Acceleratorcited by 7
  2. 2024ASiM: Modeling and Analyzing Inference Accuracy of SRAM-Based Analog CiM Circuitscited by 4
  3. 2025HaLoRA: Hardware-aware Low-Rank Adaptation for Large Language Models Based on Hybrid Compute-in-Memory Architecturecited by 2
  4. 2024IMAGINE: An 8-to-1b 22nm FD-SOI Compute-In-Memory CNN Accelerator With an End-to-End Analog Charge-Based 0.15-8POPS/W Macro Featuring Distribution-Aware Data Reshapingcited by 1

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Cited by year (2026 to 14 Oct)

Citing papers per year: 2026: 2.

2 papers.

  1. 2026Mixed-Precision Training and Compilation for RRAM-based Computing-in-Memory Acceleratorscited by 1
  2. 2026ChatNeuroSim: An LLM Agent Framework for Automated Compute-in-Memory Accelerator Deployment and Optimizationcited by 0

Similar, not cited

Close in wording, no citation either way

  1. 2025Rapid yet accurate Tile-circuit and device modeling for Analog In-Memory Computing
  2. 2022Neural-PIM: Efficient Processing-In-Memory with Neural Approximation of Peripherals
  3. 2025Analog Foundation Models
  4. 2021PR-CIM: a Variation-Aware Binary-Neural-Network Framework for Process-Resilient Computation-in-memory
  5. 2024MICSim: A Modular Simulator for Mixed-signal Compute-in-Memory based AI Accelerator
  6. 2024HCiM: ADC-Less Hybrid Analog-Digital Compute in Memory Accelerator for Deep Learning Workloads
  7. 2025AnalogNAS-Bench: A NAS Benchmark for Analog In-Memory Computing
  8. 2023Examining the Role and Limits of Batchnorm Optimization to Mitigate Diverse Hardware-noise in In-memory Computing