Zero-shifting Technique for Deep Neural Network Training on Resistive Cross-point Arrays
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Abstract (arXiv)
A resistive memory device-based computing architecture is one of the promising platforms for energy-efficient Deep Neural Network (DNN) training accelerators. The key technical challenge in realizing such accelerators is to accumulate the gradient information without a bias. Unlike the digital numbers in software which can be assigned and accessed with desired accuracy, numbers stored in resistive memory devices can only be manipulated following the physics of the device, which can significantly limit the training performance. Therefore, additional techniques and algorithm-level remedies are required to achieve the best possible performance in resistive memory device-based accelerators. In this paper, we analyze asymmetric conductance modulation characteristics in RRAM by Soft-bound synapse model and present an in-depth analysis on the relationship between device characteristics and DNN model accuracy using a 3-layer DNN trained on the MNIST dataset. We show that the imbalance between up and down update leads to a poor network performance. We introduce a concept of symmetry point and propose a zero-shifting technique which can compensate imbalance by programming the reference device and changing the zero value point of the weight. By using this zero-shifting method, we show that network performance dramatically improves for imbalanced synapse devices.
Key facts. Cited by 7 papers in the map (data through 14 Oct 2026). First posted on arXiv 24 Jul 2019.
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Citing papers per year: 2022: 2; 2023: 2; 2024: 0; 2025: 1; 2026: 2.
7 papers.
- 2023Fast offset corrected in-memory trainingcited by 11
- 2023Using the IBM Analog In-Memory Hardware Acceleration Kit for Neural Network Training and Inferencecited by 11
- 2025Analog In-memory Training on General Non-ideal Resistive Elements: The Impact of Response Functionscited by 5
- 2022Neural Network Training with Asymmetric Crosspoint Elementscited by 3
- 2026Dynamic Symmetric Point Tracking: Tackling Non-ideal Reference in Analog In-memory Trainingcited by 2
- 2026Making Analog Training Scale: Co-Designing Mapping, Optimizer, and Converterscited by 1
- 2022Mitigating Overfitting in Graph Neural Networks via Feature and Hyperplane Perturbationcited by 0
- 2026Making Analog Training Scale: Co-Designing Mapping, Optimizer, and Converters29 Sep 2026
- 2026Dynamic Symmetric Point Tracking: Tackling Non-ideal Reference in Analog In-memory Training24 Feb 2026
- 2025Analog In-memory Training on General Non-ideal Resistive Elements: The Impact of Response Functions10 Feb 2025
- 2023Using the IBM Analog In-Memory Hardware Acceleration Kit for Neural Network Training and Inference18 Jul 2023
- 2023Fast offset corrected in-memory training8 Mar 2023
- 2022Mitigating Overfitting in Graph Neural Networks via Feature and Hyperplane Perturbation28 Nov 2022
- 2022Neural Network Training with Asymmetric Crosspoint Elements31 Jan 2022