mlsanityData to 14 Oct 2026

DRAGON (Differentiable Graph Execution) : A suite of Hardware Simulation and Optimization tools for Modern AI/Non-AI Workloads

arXiv 2204.06676 ↗First posted 13 Apr 2022cs.AR cs.AI cs.ETcited by 0

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Abstract (arXiv)

We introduce DRAGON, a fast and explainable hardware simulation and optimization toolchain that enables hardware architects to simulate hardware designs, and to optimize hardware designs to efficiently execute workloads. The DRAGON toolchain provides the following tools: Hardware Model Generator (DGen), Hardware Simulator (DSim) and Hardware Optimizer (DOpt). DSim provides the simulation of running algorithms (represented as data-flow graphs) on hardware described. DGen describes the hardware in detail, with user input architectures/technology (represented in a custom description language). A novel methodology of gradient descent from the simulation allows us optimize the hardware model (giving the directions for improvements in technology parameters and design parameters), provided by Dopt. DRAGON framework (DSim) is much faster than previously avaible works for simulation, which is possible through performance-first code writing practices, mathematical formulas for common computing operations to avoid cycle-accurate simulation steps, efficient algorithms for mapping, and data-structure representations for hardware state. DRAGON framework (Dopt) generates performance optimized architectures for both AI and Non-AI Workloads, and provides technology improvement directions for 100x-1000x better future computing systems.

Key facts. No citing papers in the map yet (data through 14 Oct 2026). Builds on 7 of its 19 references that are in the map. First posted on arXiv 13 Apr 2022.

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References · 7

  1. 2018Interstellar: Using Halide's Scheduling Language to Analyze DNN Acceleratorscited by 34
  2. 2018SCALE-Sim: Systolic CNN Accelerator Simulatorcited by 26
  3. 2021NAAS: Neural Accelerator Architecture Searchcited by 24
  4. 2020ZigZag: A Memory-Centric Rapid DNN Accelerator Design Space Exploration Frameworkcited by 6
  5. 2020Design Space Exploration of Algorithmic Multi-Port Memories in High-Performance Application-Specific Acceleratorscited by 2
  6. 2020NV-Fogstore : Device-aware hybrid caching in fog computing environmentscited by 2
  7. 2021Efficient On-Chip Communication for Parallel Graph-Analytics on Spatial Architecturescited by 1

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