mlsanityData to 14 Oct 2026

WaveletECO: A Closed-Loop Physical ECO Platform and a Specialized Local Language Model

arXiv 2609.23444 ↗First posted 20 Sep 2026cs.AR cs.AIcited by 0

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Abstract (arXiv)

Engineering change order (ECO) is an important step in repairing timing and electrical violations during the late stages of chip design. Existing Agentic EDA methods primarily focus on tool invocation, with less attention to model decision quality and targeted training. A central challenge in ECO is multi-round decision-making: the model must use the results of each round to determine the next repair action. We propose WaveletECO, which integrates a closed-loop execution platform with large language models to enable agents to execute ECO decisions effectively. We also train a local 9B model through supervised fine-tuning and CPO-SimPO using execution demonstrations and decision-preference data, enabling ECO decision-making with a locally deployed model. Across 594 evaluation runs on 22 designs, WaveletECO-Policy (BF16) and (INT8) score 79.63 and 79.65, respectively, compared with GPT-6 Astra's 77.44. The estimated inference cost of INT8 is about 1/147 of GPT-6 Astra's. These results show that specialized model training supports effective, low-cost multi-round ECO repair, with repair quality retained under INT8 quantization.

Key facts. No citing papers in the map yet (data through 14 Oct 2026). Builds on 7 of its 13 references that are in the map. First posted on arXiv 20 Sep 2026.

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References · 7

  1. 2024SimPO: Simple Preference Optimization with a Reference-Free Rewardcited by 963
  2. 2024Contrastive Preference Optimization: Pushing the Boundaries of LLM Performance in Machine Translationcited by 394
  3. 2023ChipNeMo: Domain-Adapted LLMs for Chip Designcited by 174
  4. 2023ChatEDA: A Large Language Model Powered Autonomous Agent for EDAcited by 122
  5. 2024IR-Aware ECO Timing Optimization Using Reinforcement Learningcited by 4
  6. 2026Retrieve, Schedule, Reflect: LLM Agents for Chip QoR Optimizationcited by 3
  7. 2026AgenticECO: An Agentic Framework for ECO on 3D Integrated Circuitscited by 1

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  4. 2026Back to the Future: Rethinking EDA Infrastructure for Agentic Systems in Chip Design Verification
  5. 2026Open-Source LLM-Driven Formal Verification: A Multi-Agent Pipeline for RTL Repair
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  7. 2026Agentic Hardware Design as Repository-Level Code Evolution
  8. 2026ChipMEM: Verification-Grounded Memory for EDA Agents