mlsanityData to 14 Oct 2026

Recurrent Deep Differentiable Logic Gate Networks

arXiv 2508.06097 ↗First posted 8 Aug 2025cs.LGcited by 12

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Abstract (arXiv)

While differentiable logic gates have shown promise in feedforward networks, their application to sequential modeling remains unexplored. This paper presents the first implementation of Recurrent Deep Differentiable Logic Gate Networks (RDDLGN), combining Boolean operations with recurrent architectures for sequence-to-sequence learning. Evaluated on WMT'14 English-German translation, RDDLGN achieves 5.00 BLEU and 30.9% accuracy during training, approaching GRU performance (5.41 BLEU) and graceful degradation (4.39 BLEU) during inference. This work establishes recurrent logic-based neural computation as viable, opening research directions for FPGA acceleration in sequential modeling and other recursive network architectures.

Key facts. Cited by 12 papers in the map (data through 14 Oct 2026). Builds on 21 of its 34 references that are in the map. First posted on arXiv 8 Aug 2025.

Builds on

21 of 34 references.

References · 21

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9 more
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Built on by

Cited by year (2026 to 14 Oct)

Citing papers per year: 2025: 3; 2026: 9.

12 papers.

  1. 2025Light Differentiable Logic Gate Networkscited by 9
  2. 2026Polynomial Surrogate Training for Differentiable Ternary Logic Gate Networkscited by 2
  3. 2025From MNIST to ImageNet: Understanding the Scalability Boundaries of Differentiable Logic Gate Networkscited by 1
  4. 2025Differentiable Weightless Controllers: Learning Logic Circuits for Continuous Controlcited by 1
  5. 2026Inter-patient ECG Arrhythmia Classification with LGNs and LUTNscited by 1
  6. 2026Learning Compact Boolean Networkscited by 1
  7. 2026BitLogic: Training Framework for Gradient-Based FPGA-Native Neural Networkscited by 1
  8. 2026GIC-DLC: Differentiable Logic Circuits for Hardware-Friendly Grayscale Image Compressioncited by 0
  9. 2026On the Stability and Realizability of Recurrent Polynomial Surrogate Ternary Logic Gate Networkscited by 0
  10. 2026Differentiable Logic Gate Networks for Low-Latency EEG Classification on Edge Devicescited by 0
  11. 2026On the Depth Scalability of Logic Gate Networkscited by 0
  12. 2026Task-Aware Discretization of Differentiable Logic Gate Networkscited by 0