PIM-Opt: Demystifying Distributed Optimization Algorithms on a Real-World Processing-In-Memory System
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Abstract (arXiv)
Modern Machine Learning (ML) training on large-scale datasets is a very time-consuming workload. It relies on the optimization algorithm Stochastic Gradient Descent (SGD) due to its effectiveness, simplicity, and generalization performance. Processor-centric architectures (e.g., CPUs, GPUs) commonly used for modern ML training workloads based on SGD are bottlenecked by data movement between the processor and memory units due to the poor data locality in accessing large datasets. As a result, processor-centric architectures suffer from low performance and high energy consumption while executing ML training workloads. Processing-In-Memory (PIM) is a promising solution to alleviate the data movement bottleneck by placing the computation mechanisms inside or near memory. Our goal is to understand the capabilities of popular distributed SGD algorithms on real-world PIM systems to accelerate data-intensive ML training workloads. To this end, we 1) implement several representative centralized parallel SGD algorithms on the real-world UPMEM PIM system, 2) rigorously evaluate these algorithms for ML training on large-scale datasets in terms of performance, accuracy, and scalability, 3) compare to conventional CPU and GPU baselines, and 4) discuss implications for future PIM hardware and highlight the need for a shift to an algorithm-hardware codesign. Our results demonstrate three major findings: 1) The UPMEM PIM system can be a viable alternative to state-of-the-art CPUs and GPUs for many memory-bound ML training workloads, especially when operations and datatypes are natively supported by PIM hardware, 2) it is important to carefully choose the optimization algorithms that best fit PIM, and 3) the UPMEM PIM system does not scale approximately linearly with the number of nodes for many data-intensive ML training workloads. We open source all our code to facilitate future research.
Key facts. Cited by 5 papers in the map (data through 7 Oct 2026). Builds on 68 of its 211 references that are in the map. First posted on arXiv 10 Apr 2024.
Builds on
68 of 211 references.
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38 more
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Citing papers per year: 2024: 2; 2025: 2; 2026: 1.
5 papers.
- 2025PAPI: Exploiting Dynamic Parallelism in Large Language Model Decoding with a Processing-In-Memory-Enabled Computing Systemcited by 19
- 2024SwiftRL: Towards Efficient Reinforcement Learning on Real Processing-In-Memory Systemscited by 1
- 2024UpANNS: Enhancing Billion-Scale ANNS Efficiency with Real-World PIM Architecturecited by 0
- 2025Detecting Anomalies in Machine Learning Infrastructure via Hardware Telemetrycited by 0
- 2026DARTH-PUM: A Hybrid Processing-Using-Memory Architecturecited by 0
- 2026DARTH-PUM: A Hybrid Processing-Using-Memory Architecture17 Feb 2026
- 2025Detecting Anomalies in Machine Learning Infrastructure via Hardware Telemetry29 Oct 2025
- 2025PAPI: Exploiting Dynamic Parallelism in Large Language Model Decoding with a Processing-In-Memory-Enabled Computing System21 Feb 2025
- 2024UpANNS: Enhancing Billion-Scale ANNS Efficiency with Real-World PIM Architecture31 Oct 2024
- 2024SwiftRL: Towards Efficient Reinforcement Learning on Real Processing-In-Memory Systems7 May 2024