mlsanityData to 7 Oct 2026

Pathfinding Future PIM Architectures by Demystifying a Commercial PIM Technology

arXiv 2308.00846 ↗First posted 1 Aug 2023cs.ARcited by 13

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Abstract (arXiv)

Processing-in-memory (PIM) has been explored for decades by computer architects, yet it has never seen the light of day in real-world products due to their high design overheads and lack of a killer application. With the advent of critical memory-intensive workloads, several commercial PIM technologies have been introduced to the market ranging from domain-specific PIM architectures to more general-purpose PIM architectures. In this work, we deepdive into UPMEM's commercial PIM technology, a general-purpose PIM-enabled parallel architecture that is highly programmable. Our first key contribution is the development of a flexible simulation framework for PIM. The simulator we developed (aka PIMulator) enables the compilation of UPMEM-PIM source codes into its compiled machine-level instructions, which are subsequently consumed by our cycle-level performance simulator. Using PIMulator, we demystify UPMEM's PIM design through a detailed characterization study. Building on top of our characterization, we conduct a series of case studies to pathfind important architectural features that we deem will be critical for future PIM architectures to support

Key facts. Cited by 13 papers in the map (data through 7 Oct 2026). First posted on arXiv 1 Aug 2023.

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Citing papers per year: 2024: 6; 2025: 4; 2026: 3.

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