XNOR Neural Engine: a Hardware Accelerator IP for 21.6 fJ/op Binary Neural Network Inference
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Abstract (arXiv)
Binary Neural Networks (BNNs) are promising to deliver accuracy comparable to conventional deep neural networks at a fraction of the cost in terms of memory and energy. In this paper, we introduce the XNOR Neural Engine (XNE), a fully digital configurable hardware accelerator IP for BNNs, integrated within a microcontroller unit (MCU) equipped with an autonomous I/O subsystem and hybrid SRAM / standard cell memory. The XNE is able to fully compute convolutional and dense layers in autonomy or in cooperation with the core in the MCU to realize more complex behaviors. We show post-synthesis results in 65nm and 22nm technology for the XNE IP and post-layout results in 22nm for the full MCU indicating that this system can drop the energy cost per binary operation to 21.6fJ per operation at 0.4V, and at the same time is flexible and performant enough to execute state-of-the-art BNN topologies such as ResNet-34 in less than 2.2mJ per frame at 8.9 fps.
Key facts. Cited by 28 papers in the map (data through 7 Oct 2026). First posted on arXiv 9 Jul 2018.
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Citing papers per year: 2021: 6; 2022: 6; 2023: 4; 2024: 2; 2025: 7; 2026: 3.
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- 2025Benchmarking Ultra-Low-Power μNPUs28 Mar 2025
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- 2025Runtime Tunable Tsetlin Machines for Edge Inference on eFPGAs10 Feb 2025
- 2025An All-digital 8.6-nJ/Frame 65-nm Tsetlin Machine Image Classification Accelerator31 Jan 2025
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- 2023Marsellus: A Heterogeneous RISC-V AI-IoT End-Node SoC with 2-to-8b DNN Acceleration and 30%-Boost Adaptive Body Biasing15 May 2023
- 2023RedMule: A Mixed-Precision Matrix-Matrix Operation Engine for Flexible and Energy-Efficient On-Chip Linear Algebra and TinyML Training Acceleration10 Jan 2023
- 2022PalQuant: Accelerating High-precision Networks on Low-precision Accelerators3 Aug 2022
- 2022Neuromorphic Wireless Cognition: Event-Driven Semantic Communications for Remote Inference13 Jun 2022
- 2022Ultra-compact Binary Neural Networks for Human Activity Recognition on RISC-V Processors25 May 2022
- 2022Hardware Approximate Techniques for Deep Neural Network Accelerators: A Survey16 Mar 2022
- 2022Distributed On-Sensor Compute System for AR/VR Devices: A Semi-Analytical Simulation Framework for Power Estimation14 Mar 2022
- 2022Vau da muntanialas: Energy-efficient multi-die scalable acceleration of RNN inference14 Feb 2022
- 2021Quantization Backdoors to Deep Learning Commercial Frameworks20 Aug 2021
- 2021Quantum Annealing Formulation for Binary Neural Networks5 Jul 2021
- 2021A Construction Kit for Efficient Low Power Neural Network Accelerator Designs24 Jun 2021
- 2021RBNN: Memory-Efficient Reconfigurable Deep Binary Neural Network with IP Protection for Internet of Things9 May 2021
- 2021Training Multi-bit Quantized and Binarized Networks with A Learnable Symmetric Quantizer1 Apr 2021
- 2021RA-BNN: Constructing Robust & Accurate Binary Neural Network to Simultaneously Defend Adversarial Bit-Flip Attack and Improve Accuracy22 Mar 2021
- 2022Hardware Approximate Techniques for Deep Neural Network Accelerators: A Surveycited by 39
- 2021Quantization Backdoors to Deep Learning Commercial Frameworkscited by 25
- 2022Neuromorphic Wireless Cognition: Event-Driven Semantic Communications for Remote Inferencecited by 16
- 2021Quantum Annealing Formulation for Binary Neural Networkscited by 13
- 2021RA-BNN: Constructing Robust & Accurate Binary Neural Network to Simultaneously Defend Adversarial Bit-Flip Attack and Improve Accuracycited by 11
- 2022Distributed On-Sensor Compute System for AR/VR Devices: A Semi-Analytical Simulation Framework for Power Estimationcited by 8
- 2023Marsellus: A Heterogeneous RISC-V AI-IoT End-Node SoC with 2-to-8b DNN Acceleration and 30%-Boost Adaptive Body Biasingcited by 8
- 2022Ultra-compact Binary Neural Networks for Human Activity Recognition on RISC-V Processorscited by 7
- 2025Benchmarking Ultra-Low-Power μNPUscited by 6
- 2024Efficient Deep Learning Infrastructures for Embedded Computing Systems: A Comprehensive Survey and Future Envisioncited by 5
- 2023RedMule: A Mixed-Precision Matrix-Matrix Operation Engine for Flexible and Energy-Efficient On-Chip Linear Algebra and TinyML Training Accelerationcited by 4
- 2021RBNN: Memory-Efficient Reconfigurable Deep Binary Neural Network with IP Protection for Internet of Thingscited by 3
12 most cited of 27 All 27 (JSON)
- 2026Active Continual Learning with Metaplastic Binary Bayesian Neural Networks28 May 2026
- 2026PiC-BNN: A 128-kbit 65 nm Processing-in-CAM-Based End-to-End Binary Neural Network Accelerator8 Jan 2026
- 2025CAMformer: Associative Memory is All You Need24 Nov 2025
- 2025An Open-Source HW-SW Co-Development Framework Enabling Efficient Multi-Accelerator Systems20 Aug 2025
- 2025Benchmarking Ultra-Low-Power μNPUs28 Mar 2025
- 2025Stochastic Engrams for Efficient Continual Learning27 Mar 2025
- 2025On Space Folds of ReLU Neural Networks14 Feb 2025
- 2025Runtime Tunable Tsetlin Machines for Edge Inference on eFPGAs10 Feb 2025
- 2025An All-digital 8.6-nJ/Frame 65-nm Tsetlin Machine Image Classification Accelerator31 Jan 2025
- 2024Efficient Deep Learning Infrastructures for Embedded Computing Systems: A Comprehensive Survey and Future Envision3 Nov 2024
- 2024Toward Attention-based TinyML: A Heterogeneous Accelerated Architecture and Automated Deployment Flow5 Aug 2024
- 2023Cost-Driven Hardware-Software Co-Optimization of Machine Learning Pipelines11 Oct 2023
12 newest of 27 All 27 (JSON)