Marsellus: A Heterogeneous RISC-V AI-IoT End-Node SoC with 2-to-8b DNN Acceleration and 30%-Boost Adaptive Body Biasing
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Abstract (arXiv)
Emerging Artificial Intelligence-enabled Internet-of-Things (AI-IoT) System-on-a-Chip (SoC) for augmented reality, personalized healthcare, and nano-robotics need to run many diverse tasks within a power envelope of a few tens of mW over a wide range of operating conditions: compute-intensive but strongly quantized Deep Neural Network (DNN) inference, as well as signal processing and control requiring high-precision floating-point. We present Marsellus, an all-digital heterogeneous SoC for AI-IoT end-nodes fabricated in GlobalFoundries 22nm FDX that combines 1) a general-purpose cluster of 16 RISC-V Digital Signal Processing (DSP) cores attuned for the execution of a diverse range of workloads exploiting 4-bit and 2-bit arithmetic extensions (XpulpNN), combined with fused MAC&LOAD operations and floating-point support; 2) a 2-8bit Reconfigurable Binary Engine (RBE) to accelerate 3x3 and 1x1 (pointwise) convolutions in DNNs; 3) a set of On-Chip Monitoring (OCM) blocks connected to an Adaptive Body Biasing (ABB) generator and a hardware control loop, enabling on-the-fly adaptation of transistor threshold voltages. Marsellus achieves up to 180 Gop/s or 3.32 Top/s/W on 2-bit precision arithmetic in software, and up to 637 Gop/s or 12.4 Top/s/W on hardware-accelerated DNN layers.
Key facts. Cited by 8 papers in the map (data through 7 Oct 2026). Builds on 15 of its 47 references that are in the map. First posted on arXiv 15 May 2023.
Builds on
15 of 47 references.
References · 15
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3 more
- 2023TinyVers: A Tiny Versatile System-on-chip with State-Retentive eMRAM for ML Inference at the Extreme Edgecited by 5
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Built on by
Citing papers per year: 2023: 2; 2024: 2; 2025: 3; 2026: 1.
8 papers.
- 2023Ultra-Efficient On-Device Object Detection on AI-Integrated Smart Glasses with TinyissimoYOLOcited by 15
- 2023Flexible and Fully Quantized Ultra-Lightweight TinyissimoYOLO for Ultra-Low-Power Edge Systemscited by 11
- 2024DSORT-MCU: Detecting Small Objects in Real-Time on Microcontroller Unitscited by 4
- 2025XR-NPE: High-Throughput Mixed-precision SIMD Neural Processing Engine for Extended Reality Perception Workloadscited by 3
- 2024DSP-MLIR: A MLIR Dialect for Digital Signal Processingcited by 1
- 2025SteROI-D: System Design and Mapping for Stereo Depth Inference on Regions of Interestcited by 0
- 2025GAVINA: flexible aggressive undervolting for bit-serial mixed-precision DNN accelerationcited by 0
- 2026CUTEv2: Unified and Configurable Matrix Extension for Diverse CPU Architectures with Minimal Design Overheadcited by 0
- 2026CUTEv2: Unified and Configurable Matrix Extension for Diverse CPU Architectures with Minimal Design Overhead13 Apr 2026
- 2025GAVINA: flexible aggressive undervolting for bit-serial mixed-precision DNN acceleration28 Nov 2025
- 2025XR-NPE: High-Throughput Mixed-precision SIMD Neural Processing Engine for Extended Reality Perception Workloads18 Aug 2025
- 2025SteROI-D: System Design and Mapping for Stereo Depth Inference on Regions of Interest13 Feb 2025
- 2024DSORT-MCU: Detecting Small Objects in Real-Time on Microcontroller Units22 Oct 2024
- 2024DSP-MLIR: A MLIR Dialect for Digital Signal Processing20 Aug 2024
- 2023Ultra-Efficient On-Device Object Detection on AI-Integrated Smart Glasses with TinyissimoYOLO2 Nov 2023
- 2023Flexible and Fully Quantized Ultra-Lightweight TinyissimoYOLO for Ultra-Low-Power Edge Systems12 Jul 2023