mlsanityData to 14 Oct 2026

Neural Cache: Bit-Serial In-Cache Acceleration of Deep Neural Networks

arXiv 1805.03718 ↗First posted 9 May 2018cs.AR cs.NEcited by 32

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Abstract (arXiv)

This paper presents the Neural Cache architecture, which re-purposes cache structures to transform them into massively parallel compute units capable of running inferences for Deep Neural Networks. Techniques to do in-situ arithmetic in SRAM arrays, create efficient data mapping and reducing data movement are proposed. The Neural Cache architecture is capable of fully executing convolutional, fully connected, and pooling layers in-cache. The proposed architecture also supports quantization in-cache. Our experimental results show that the proposed architecture can improve inference latency by 18.3x over state-of-art multi-core CPU (Xeon E5), 7.7x over server class GPU (Titan Xp), for Inception v3 model. Neural Cache improves inference throughput by 12.4x over CPU (2.2x over GPU), while reducing power consumption by 50% over CPU (53% over GPU).

Key facts. Cited by 32 papers in the map (data through 14 Oct 2026). First posted on arXiv 9 May 2018.

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Citing papers per year: 2021: 4; 2022: 8; 2023: 4; 2024: 8; 2025: 4; 2026: 4.

32 papers.

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  1. 2023LLM in a flash: Efficient Large Language Model Inference with Limited Memorycited by 177
  2. 2022NIPQ: Noise proxy-based Integrated Pseudo-Quantizationcited by 35
  3. 2024Tender: Accelerating Large Language Models via Tensor Decomposition and Runtime Requantizationcited by 28
  4. 2022SmartSAGE: Training Large-scale Graph Neural Networks using In-Storage Processing Architecturescited by 13
  5. 2024Reconsidering the Energy Efficiency of Spiking Neural Networks Inference from Analytical Perspectivescited by 13
  6. 2022Sparse Attention Acceleration with Synergistic In-Memory Pruning and On-Chip Recomputationcited by 12
  7. 2022Accelerating Attention through Gradient-Based Learned Runtime Pruningcited by 8
  8. 2022Accelerating Neural Network Inference with Processing-in-DRAM: From the Edge to the Cloudcited by 5
  9. 2024FlexiBit: Fully Flexible Precision Bit-parallel Accelerator Architecture for Arbitrary Mixed Precision AIcited by 5
  10. 2021Rethinking Floating Point Overheads for Mixed Precision DNN Acceleratorscited by 4
  11. 2021A Survey of Near-Data Processing Architectures for Neural Networkscited by 4
  12. 2022Machine Learning Training on a Real Processing-in-Memory Systemcited by 4
20 more
  1. 2024CIM-MLC: A Multi-level Compilation Stack for Computing-In-Memory Acceleratorscited by 3
  2. 2022An Experimental Evaluation of Machine Learning Training on a Real Processing-in-Memory Systemcited by 2
  3. 2025OISMA: On-the-fly In-memory Stochastic Multiplication Architecture for Matrix-Multiplication Workloadscited by 2
  4. 2026AQPIM: Breaking the PIM Capacity Wall for LLMs with In-Memory Activation Quantizationcited by 2
  5. 2021ODIN: A Bit-Parallel Stochastic Arithmetic Based Accelerator for In-Situ Neural Network Processing in Phase Change RAMcited by 1
  6. 2021ATRIA: A Bit-Parallel Stochastic Arithmetic Based Accelerator for In-DRAM CNN Processingcited by 1
  7. 2022Heterogeneous Data-Centric Architectures for Modern Data-Intensive Applications: Case Studies in Machine Learning and Databasescited by 1
  8. 2023RedBit: An End-to-End Flexible Framework for Evaluating the Accuracy of Quantized CNNscited by 1
  9. 2023TransPimLib: A Library for Efficient Transcendental Functions on Processing-in-Memory Systemscited by 1
  10. 2023DAISM: Digital Approximate In-SRAM Multiplier-based Accelerator for DNN Training and Inferencecited by 1
  11. 2024ARTEMIS: A Mixed Analog-Stochastic In-DRAM Accelerator for Transformer Neural Networkscited by 1
  12. 2024An Event-Based Digital Compute-In-Memory Accelerator with Flexible Operand Resolution and Layer-Wise Weight/Output Stationaritycited by 1
  13. 2025SAIL: SRAM-Accelerated LLM Inference System with Lookup-Table-based GEMVcited by 1
  14. 2025DISCA: A Digital In-memory Stochastic Computing Architecture Using A Compressed Bent-Pyramid Formatcited by 1
  15. 2024OPTIMA: Design-Space Exploration of Discharge-Based In-SRAM Computing: Quantifying Energy-Accuracy Trade-Offscited by 0
  16. 2024PREBA: A Hardware/Software Co-Design for Multi-Instance GPU based AI Inference Serverscited by 0
  17. 2025Hardware-software co-exploration with racetrack memory based in-memory computing for CNN inference in embedded systemscited by 0
  18. 2026Time--to--Digital Converter (TDC)--Based Resonant Compute--in--Memory for INT8 CNNs with Layer--Optimized SRAM Mappingcited by 0
  19. 2026Matterhorn: Masked Time-to-First-Spike Encoding by Reassigning the Silent State for Sparse and Energy-Efficient Spiking Transformerscited by 0
  20. 2026CRAM-ER: Error-Resilient Spintronic Computational Random Access Memory for Scalable In-Memory Computationcited by 0