Glow: Graph Lowering Compiler Techniques for Neural Networks
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Abstract (arXiv)
This paper presents the design of Glow, a machine learning compiler for heterogeneous hardware. It is a pragmatic approach to compilation that enables the generation of highly optimized code for multiple targets. Glow lowers the traditional neural network dataflow graph into a two-phase strongly-typed intermediate representation. The high-level intermediate representation allows the optimizer to perform domain-specific optimizations. The lower-level instruction-based address-only intermediate representation allows the compiler to perform memory-related optimizations, such as instruction scheduling, static memory allocation and copy elimination. At the lowest level, the optimizer performs machine-specific code generation to take advantage of specialized hardware features. Glow features a lowering phase which enables the compiler to support a high number of input operators as well as a large number of hardware targets by eliminating the need to implement all operators on all targets. The lowering phase is designed to reduce the input space and allow new hardware backends to focus on a small number of linear algebra primitives.
Key facts. Cited by 73 papers in the map (data through 7 Oct 2026). First posted on arXiv 2 May 2018.
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Citing papers per year: 2020: 1; 2021: 17; 2022: 19; 2023: 8; 2024: 8; 2025: 7; 2026: 13.
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50 most cited of 73 All 73 (JSON)
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- 2025DiTOX: Fault Detection and Localization in the ONNX Optimizer3 May 2025
- 2024ThunderKittens: Simple, Fast, and Adorable AI Kernels27 Oct 2024
- 2024Scorch: A Library for Sparse Deep Learning27 May 2024
- 2024MTP: A Meaning-Typed Language Abstraction for AI-Integrated Programming14 May 2024
- 2024Lancet: Accelerating Mixture-of-Experts Training via Whole Graph Computation-Communication Overlapping30 Apr 2024
- 2024Deep Learning Library Testing: Definition, Methods and Challenges27 Apr 2024
- 2024OpTC -- A Toolchain for Deployment of Neural Networks on AURIX TC3xx Microcontrollers24 Apr 2024
- 2024Proteus: Preserving Model Confidentiality during Graph Optimizations18 Apr 2024
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- 2023GEVO-ML: Optimizing Machine Learning Code with Evolutionary Computation16 Oct 2023
- 2023Compiled Models, Built-In Exploits: Uncovering Pervasive Bit-Flip Attack Surfaces in DNN Executables12 Sep 2023
- 2023LoopTune: Optimizing Tensor Computations with Reinforcement Learning4 Sep 2023
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- 2022MSRL: Distributed Reinforcement Learning with Dataflow Fragments3 Oct 2022
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- 2022ByteComp: Revisiting Gradient Compression in Distributed Training28 May 2022
- 2022Learning to Reverse DNNs from AI Programs Automatically20 May 2022
- 2022Special Session: Towards an Agile Design Methodology for Efficient, Reliable, and Secure ML Systems18 Apr 2022
- 2022Federated Remote Physiological Measurement with Imperfect Data11 Mar 2022
50 newest of 73 All 73 (JSON)
- 2021Pruning and Quantization for Deep Neural Network Acceleration: A Surveycited by 259
- 2021Efficient Deep Learning: A Survey on Making Deep Learning Models Smaller, Faster, and Bettercited by 153
- 2021GSPMD: General and Scalable Parallelization for ML Computation Graphscited by 109
- 2023Full Stack Optimization of Transformer Inference: a Surveycited by 79
- 2024ThunderKittens: Simple, Fast, and Adorable AI Kernelscited by 34
- 2022On-device Training: A First Overview on Existing Systemscited by 18
- 2021LazyTensor: combining eager execution with domain-specific compilerscited by 11
- 2022Learning to Reverse DNNs from AI Programs Automaticallycited by 11
- 2021UNIT: Unifying Tensorized Instruction Compilationcited by 10
- 2021MetaTune: Meta-Learning Based Cost Model for Fast and Efficient Auto-tuning Frameworkscited by 9
- 2021Revisiting Neuron Coverage for DNN Testing: A Layer-Wise and Distribution-Aware Criterioncited by 9
- 2022Coverage-Guided Tensor Compiler Fuzzing with Joint IR-Pass Mutationcited by 9
12 most cited of 69 All 69 (JSON)
- 2026RLX: A Unified Multi-Backend Tensor Compiler and Distributed Runtime in Rust29 Sep 2026
- 2026RISC-V and machine learning: a survey17 Sep 2026
- 2026Meganeura: Portable GPU Training and Inference through Vulkan and Metal3 Aug 2026
- 2026Mitigating Compiler Fusion-Induced Power Bursts in Mobile NPU Inference as the Battery Depletes17 Jul 2026
- 2026Provenance Tracking in AI Compilers through the Lens of Coalgebra9 Jun 2026
- 2026FlowCompile: An Optimizing Compiler for Structured LLM Workflows13 May 2026
- 2026Nautilus: An Auto-Scheduling Tensor Compiler for Efficient Tiled GPU Kernels16 Apr 2026
- 2026Forge-UGC: FX optimization and register-graph engine for universal graph compiler14 Apr 2026
- 2026From LLM to Silicon: RL-Driven ASIC Architecture Exploration for On-Device AI Inference8 Apr 2026
- 2026Hexagon-MLIR: An AI Compilation Stack For Qualcomm's Neural Processing Units (NPUs)23 Feb 2026
- 2026Optimizing Tensor Train Decomposition in DNNs for RISC-V Architectures Using Design Space Exploration and Compiler Optimizations2 Feb 2026
- 2026A Two-Stage GPU Kernel Tuner Combining Semantic Refactoring and Search-Based Optimization19 Jan 2026
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