PIM-LLM: A High-Throughput Hybrid PIM Architecture for 1-bit LLMs
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Abstract (arXiv)
In this paper, we propose PIM-LLM, a hybrid architecture developed to accelerate 1-bit large language models (LLMs). PIM-LLM leverages analog processing-in-memory (PIM) architectures and digital systolic arrays to accelerate low-precision matrix multiplication (MatMul) operations in projection layers and high-precision MatMul operations in attention heads of 1-bit LLMs, respectively. Our design achieves up to roughly 80x improvement in tokens per second and a 70% increase in tokens per joule compared to conventional hardware accelerators. Additionally, PIM-LLM outperforms previous PIM-based LLM accelerators, setting a new benchmark with at least 2x and 5x improvement in GOPS and GOPS/W, respectively.
Key facts. Cited by 1 paper in the map (data through 14 Oct 2026). Builds on 22 of its 42 references that are in the map. First posted on arXiv 31 Mar 2025.
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22 of 42 references.
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10 more
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Citing papers per year: 2025: 1.
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- 2025LUT-LLM: Efficient Large Language Model Inference with Memory-based Computations on FPGAs