Reliable edge machine learning hardware for scientific applications
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Abstract (arXiv)
Extreme data rate scientific experiments create massive amounts of data that require efficient ML edge processing. This leads to unique validation challenges for VLSI implementations of ML algorithms: enabling bit-accurate functional simulations for performance validation in experimental software frameworks, verifying those ML models are robust under extreme quantization and pruning, and enabling ultra-fine-grained model inspection for efficient fault tolerance. We discuss approaches to developing and validating reliable algorithms at the scientific edge under such strict latency, resource, power, and area requirements in extreme experimental environments. We study metrics for developing robust algorithms, present preliminary results and mitigation strategies, and conclude with an outlook of these and future directions of research towards the longer-term goal of developing autonomous scientific experimentation methods for accelerated scientific discovery.
Key facts. Cited by 2 papers in the map (data through 14 Oct 2026). Builds on 12 of its 19 references that are in the map. First posted on arXiv 27 Jun 2024.
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12 of 19 references.
References · 12
- 2019Similarity of Neural Network Representations Revisitedcited by 1,755
- 2021A Survey of Quantization Methods for Efficient Neural Network Inferencecited by 815
- 2019PyHessian: Neural Networks Through the Lens of the Hessiancited by 292
- 2018Fast inference of deep neural networks in FPGAs for particle physicscited by 133
- 2019Robust Learning with Jacobian Regularizationcited by 129
- 2020Automatic heterogeneous quantization of deep neural networks for low-latency inference on the edge for particle detectorscited by 80
- 2021A Winning Hand: Compressing Deep Networks Can Improve Out-Of-Distribution Robustnesscited by 62
- 2021Taxonomizing local versus global structure in neural network loss landscapescited by 34
- 2021Applications and Techniques for Fast Machine Learning in Sciencecited by 32
- 2021A reconfigurable neural network ASIC for detector front-end data compression at the HL-LHCcited by 20
- 2020Assessing Intelligence in Artificial Neural Networkscited by 3
- 2024Architectural Implications of Neural Network Inference for High Data-Rate, Low-Latency Scientific Applicationscited by 2
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Citing papers per year: 2025: 1; 2026: 1.
2 papers.
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