TAG: Learning Circuit Spatial Embedding From Layouts
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Abstract (arXiv)
Analog and mixed-signal (AMS) circuit designs still rely on human design expertise. Machine learning has been assisting circuit design automation by replacing human experience with artificial intelligence. This paper presents TAG, a new paradigm of learning the circuit representation from layouts leveraging text, self-attention and graph. The embedding network model learns spatial information without manual labeling. We introduce text embedding and a self-attention mechanism to AMS circuit learning. Experimental results demonstrate the ability to predict layout distances between instances with industrial FinFET technology benchmarks. The effectiveness of the circuit representation is verified by showing the transferability to three other learning tasks with limited data in the case studies: layout matching prediction, wirelength estimation, and net parasitic capacitance prediction.
Key facts. Cited by 9 papers in the map (data through 7 Oct 2026). Builds on 12 of its 29 references that are in the map. First posted on arXiv 7 Sep 2022.
Builds on
12 of 29 references.
References · 12
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Built on by
Citing papers per year: 2023: 2; 2024: 0; 2025: 4; 2026: 3.
9 papers.
- 2023DeepGate2: Functionality-Aware Circuit Representation Learningcited by 33
- 2025NetTAG: A Multimodal RTL-and-Layout-Aligned Netlist Foundation Model via Text-Attributed Graphcited by 9
- 2023Graph Attention-Based Symmetry Constraint Extraction for Analog Circuitscited by 3
- 2025Emerging ML-AI Techniques for Analog and RF EDAcited by 1
- 2025RF-Informed Graph Neural Networks for Accurate and Data-Efficient Circuit Performance Predictioncited by 0
- 2025Learning Representations Through Contrastive Neural Model Checkingcited by 0
- 2026KCLNet: Electrically Equivalence-Oriented Graph Representation Learning for Analog Circuitscited by 0
- 2026FusionCell: Cross-Attentive Fusion of Layout Geometry and Netlist Topology for Standard-Cell Performance Predictioncited by 0
- 2026ParasGB: A Graph Benchmark Suite for Parasitic Estimation on AMS Circuitscited by 0
- 2026ParasGB: A Graph Benchmark Suite for Parasitic Estimation on AMS Circuits25 Jul 2026
- 2026FusionCell: Cross-Attentive Fusion of Layout Geometry and Netlist Topology for Standard-Cell Performance Prediction19 May 2026
- 2026KCLNet: Electrically Equivalence-Oriented Graph Representation Learning for Analog Circuits25 Mar 2026
- 2025Learning Representations Through Contrastive Neural Model Checking2 Oct 2025
- 2025RF-Informed Graph Neural Networks for Accurate and Data-Efficient Circuit Performance Prediction22 Aug 2025
- 2025Emerging ML-AI Techniques for Analog and RF EDA12 May 2025
- 2025NetTAG: A Multimodal RTL-and-Layout-Aligned Netlist Foundation Model via Text-Attributed Graph12 Apr 2025
- 2023Graph Attention-Based Symmetry Constraint Extraction for Analog Circuits22 Dec 2023
- 2023DeepGate2: Functionality-Aware Circuit Representation Learning25 May 2023