Doping: A technique for efficient compression of LSTM models using sparse structured additive matrices
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Abstract (arXiv)
Structured matrices, such as those derived from Kronecker products (KP), are effective at compressing neural networks, but can lead to unacceptable accuracy loss when applied to large models. In this paper, we propose the notion of doping -- addition of an extremely sparse matrix to a structured matrix. Doping facilitates additional degrees of freedom for a small number of parameters, allowing them to independently diverge from the fixed structure. To train LSTMs with doped structured matrices, we introduce the additional parameter matrix while slowly annealing its sparsity level. However, we find that performance degrades as we slowly sparsify the doping matrix, due to co-matrix adaptation (CMA) between the structured and the sparse matrices. We address this over dependence on the sparse matrix using a co-matrix dropout regularization (CMR) scheme. We provide empirical evidence to show that doping, CMA and CMR are concepts generally applicable to multiple structured matrices (Kronecker Product, LMF, Hybrid Matrix Decomposition). Additionally, results with doped kronecker product matrices demonstrate state-of-the-art accuracy at large compression factors (10 - 25x) across 4 natural language processing applications with minor loss in accuracy. Doped KP compression technique outperforms previous state-of-the art compression results by achieving 1.3 - 2.4x higher compression factor at a similar accuracy, while also beating strong alternatives like pruning and low-rank methods by a large margin (8% or more). Additionally, we show that doped KP can be deployed on commodity hardware using the current software stack and achieve 2.5 - 5.5x inference run-time speed-up over baseline.
Key facts. Cited by 5 papers in the map (data through 7 Oct 2026). Builds on 51 of its 75 references that are in the map. First posted on arXiv 14 Feb 2021.
Builds on
51 of 75 references.
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Citing papers per year: 2021: 1; 2022: 1; 2023: 1; 2024: 1; 2025: 0; 2026: 1.
5 papers.
- 2022Machine Learning for Microcontroller-Class Hardware: A Reviewcited by 28
- 2021S2TA: Exploiting Structured Sparsity for Energy-Efficient Mobile CNN Accelerationcited by 19
- 2024Enabling Unstructured Sparse Acceleration on Structured Sparse Acceleratorscited by 8
- 2023Sparse-IFT: Sparse Iso-FLOP Transformations for Maximizing Training Efficiencycited by 7
- 2026Large Models for Small Devices: Recent Advances and Empirical Analysis of Edge AI Deploymentcited by 0
- 2026Large Models for Small Devices: Recent Advances and Empirical Analysis of Edge AI Deployment16 Aug 2026
- 2024Enabling Unstructured Sparse Acceleration on Structured Sparse Accelerators12 Mar 2024
- 2023Sparse-IFT: Sparse Iso-FLOP Transformations for Maximizing Training Efficiency21 Mar 2023
- 2022Machine Learning for Microcontroller-Class Hardware: A Review29 May 2022
- 2021S2TA: Exploiting Structured Sparsity for Energy-Efficient Mobile CNN Acceleration16 Jul 2021