Circuit Routing Using Monte Carlo Tree Search and Deep Neural Networks
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Abstract (arXiv)
Circuit routing is a fundamental problem in designing electronic systems such as integrated circuits (ICs) and printed circuit boards (PCBs) which form the hardware of electronics and computers. Like finding paths between pairs of locations, circuit routing generates traces of wires to connect contacts or leads of circuit components. It is challenging because finding paths between dense and massive electronic components involves a very large search space. Existing solutions are either manually designed with domain knowledge or tailored to specific design rules, hence, difficult to adapt to new problems or design needs. Therefore, a general routing approach is highly desired. In this paper, we model the circuit routing as a sequential decision-making problem, and solve it by Monte Carlo tree search (MCTS) with deep neural network (DNN) guided rollout. It could be easily extended to routing cases with more routing constraints and optimization goals. Experiments on randomly generated single-layer circuits show the potential to route complex circuits. The proposed approach can solve the problems that benchmark methods such as sequential A* method and Lee's algorithm cannot solve, and can also outperform the vanilla MCTS approach.
Key facts. Cited by 6 papers in the map (data through 14 Oct 2026). First posted on arXiv 24 Jun 2020.
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Citing papers per year: 2021: 2; 2022: 2; 2023: 0; 2024: 0; 2025: 1; 2026: 1.
6 papers.
- 2021NVCell: Standard Cell Layout in Advanced Technology Nodes with Reinforcement Learningcited by 7
- 2022Learning to design without prior data: Discovering generalizable design strategies using deep learning and tree searchcited by 5
- 2022Towards Machine Learning for Placement and Routing in Chip Design: a Methodological Overviewcited by 4
- 2021Ranking Cost: Building An Efficient and Scalable Circuit Routing Planner with Evolution-Based Optimizationcited by 0
- 2025QiMeng: Fully Automated Hardware and Software Design for Processor Chipcited by 0
- 2026OmniRouting: A Semantic-Coupled Multimodal Benchmark for Constraint-Aware Spatial Reasoning in PCB Routingcited by 0
- 2026OmniRouting: A Semantic-Coupled Multimodal Benchmark for Constraint-Aware Spatial Reasoning in PCB Routing5 Aug 2026
- 2025QiMeng: Fully Automated Hardware and Software Design for Processor Chip5 Jun 2025
- 2022Learning to design without prior data: Discovering generalizable design strategies using deep learning and tree search28 Nov 2022
- 2022Towards Machine Learning for Placement and Routing in Chip Design: a Methodological Overview28 Feb 2022
- 2021Ranking Cost: Building An Efficient and Scalable Circuit Routing Planner with Evolution-Based Optimization8 Oct 2021
- 2021NVCell: Standard Cell Layout in Advanced Technology Nodes with Reinforcement Learning9 Jul 2021