NVIDIA Tensor Core Programmability, Performance & Precision
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Abstract (arXiv)
The NVIDIA Volta GPU microarchitecture introduces a specialized unit, called "Tensor Core" that performs one matrix-multiply-and-accumulate on 4x4 matrices per clock cycle. The NVIDIA Tesla V100 accelerator, featuring the Volta microarchitecture, provides 640 Tensor Cores with a theoretical peak performance of 125 Tflops/s in mixed precision. In this paper, we investigate current approaches to program NVIDIA Tensor Cores, their performances and the precision loss due to computation in mixed precision. Currently, NVIDIA provides three different ways of programming matrix-multiply-and-accumulate on Tensor Cores: the CUDA Warp Matrix Multiply Accumulate (WMMA) API, CUTLASS, a templated library based on WMMA, and cuBLAS GEMM. After experimenting with different approaches, we found that NVIDIA Tensor Cores can deliver up to 83 Tflops/s in mixed precision on a Tesla V100 GPU, seven and three times the performance in single and half precision respectively. A WMMA implementation of batched GEMM reaches a performance of 4 Tflops/s. While precision loss due to matrix multiplication with half precision input might be critical in many HPC applications, it can be considerably reduced at the cost of increased computation. Our results indicate that HPC applications using matrix multiplications can strongly benefit from using of NVIDIA Tensor Cores.
Key facts. Cited by 77 papers in the map (data through 7 Oct 2026). First posted on arXiv 11 Mar 2018.
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Citing papers per year: 2021: 11; 2022: 9; 2023: 9; 2024: 17; 2025: 16; 2026: 15.
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- 2025Energy Scaling Laws for Diffusion Models: Quantifying Compute in Image Generation21 Nov 2025
- 2024MixDQ: Memory-Efficient Few-Step Text-to-Image Diffusion Models with Metric-Decoupled Mixed Precision Quantization28 May 2024
- 2024Griffin: Mixing Gated Linear Recurrences with Local Attention for Efficient Language Modelscited by 232
- 2022LUT-GEMM: Quantized Matrix Multiplication based on LUTs for Efficient Inference in Large-Scale Generative Language Modelscited by 98
- 2021Proof-of-Learning: Definitions and Practicecited by 81
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- 2023XTREME-UP: A User-Centric Scarce-Data Benchmark for Under-Represented Languagescited by 34
- 2021Fast Neural Representations for Direct Volume Renderingcited by 32
- 2024Jetfire: Efficient and Accurate Transformer Pretraining with INT8 Data Flow and Per-Block Quantizationcited by 30
- 2023A Machine Learning-oriented Survey on Tiny Machine Learningcited by 26
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- 2021PQK: Model Compression via Pruning, Quantization, and Knowledge Distillationcited by 19
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- 2026ETHEREAL: A 25.6-μs/inf. Low-latency Event-driven Graph-neural-network Processor for High-resolution Vision at the Edge18 Aug 2026
- 2026FluxBin: Flexible LUT-based Ultra-low-bit LLM Inference by Algorithm-Kernel Synergy16 Aug 2026
- 2026Hand-Written PTX Tensor-Core GEMM Kernels: A Multi-Precision Study on NVIDIA L410 Aug 2026
- 2026Scalable High-Fidelity Macromolecular Docking for GPU-Accelerated Supercomputers7 Aug 2026
- 2026AI-RAN on NPUs: Baseband Processing Without Baseband Chips5 Jul 2026
- 2026Rigel: Reverse-Engineering the Metal 4.1 Tensor Compute Path on the Apple M4 Max GPU11 Jun 2026
- 2026BubbleSpec: Turning Long-Tail Bubbles into Speculative Rollout Drafts for Synchronous Reinforcement Learning9 May 2026
- 2026TopoMamba: Topology-Aware Scanning and Fusion for Segmenting Heterogeneous Medical Visual Media28 Apr 2026
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