Accelerating the Mitigation of LLM Inference Nondeterminism Across GPU Architectures
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Abstract (arXiv)
Large language model (LLM) outputs are expected to be reproducible under greedy decoding, yet in practice the same model, prompt, and software stack produce different outputs on different GPUs. The root cause is floating-point non-associativity combined with hardware-dependent kernel selection. Inference frameworks select different matrix-multiplication kernels on each architecture, with different parallel reduction orders and unspecified tensor-core arithmetic, and the resulting rounding differences can flip output tokens. Existing solutions have imperfect cross-architecture reproducibility and incur a significant performance penalty. We present a solution employing a set of fixed-configuration fused-upcast GEMM kernels that load 16-bit weights from memory, upcast them to FP32 in registers, and accumulate with IEEE-754 arithmetic in a reduction order that is a pure function of the problem shape and is therefore independent of the device, its SM count, or kernel scheduling. By fixing the floating-point reduction order as a function of problem shape alone, every GPU runs the same operation sequence, so cross-architecture reproducibility of the linear layers reduces to correct IEEE-754 arithmetic rather than to rounding differences staying below a tie-flip threshold. We confirm our solution's linear-layer outputs are bitwise identical across NVIDIA Ampere, Ada, and Hopper GPUs, while running 1.17 to 3.1× faster end-to-end than the state-of-the-art solution and cutting weight-memory traffic in half.
Key facts. Cited by 1 paper in the map (data through 14 Oct 2026). Builds on 13 of its 21 references that are in the map. First posted on arXiv 22 Sep 2026.
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13 of 21 references.
References · 13
- 2021Training Verifiers to Solve Math Word Problemscited by 10,109
- 2023Let's Verify Step by Stepcited by 3,789
- 2023GPQA: A Graduate-Level Google-Proof Q&A Benchmarkcited by 2,879
- 2023AWQ: Activation-aware Weight Quantization for LLM Compression and Accelerationcited by 1,298
- 2018NVIDIA Tensor Core Programmability, Performance & Precisioncited by 79
- 2025Understanding and Mitigating Numerical Sources of Nondeterminism in LLM Inferencecited by 53
- 2026LLM-42: Enabling Determinism in LLM Inference with Verified Speculationcited by 16
- 2022Dissecting Tensor Cores via Microbenchmarks: Latency, Throughput and Numeric Behaviorscited by 10
- 2024Testing GPU Numerics: Finding Numerical Differences Between NVIDIA and AMD GPUscited by 5
- 2025An SMT Formalization of Mixed-Precision Matrix Multiplication: Modeling Three Generations of Tensor Corescited by 5
- 2024Revealing Floating-Point Accumulation Orders in Software/Hardware Implementationscited by 4
- 2026Hawkeye: Reproducing GPU-Level Non-Determinismcited by 2
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