mlsanityData to 14 Oct 2026

NOVA-CIM: Noise- and Correlation-Tolerant Stochastic Interfaces for Analog Compute-in-Memory

arXiv 2609.07059 ↗First posted 7 Sep 2026cs.ARcited by 0

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Abstract (arXiv)

Analog compute-in-memory (CIM) enables energy-efficient model acceleration, but its reliance on ADC-based readout, which directly quantizes noisy column currents, makes inference accuracy highly sensitive to analog read noise, active-row scaling, and ADC precision. In this paper, we present NOVA-CIM, a noise- and correlation-tolerant stochastic interface for analog CIM by replacing multi-bit ADC readout with random-reference 1-bit sensing and reconstructing results through lightweight counting. By converting column currents into comparison probabilities, this probability-domain readout averages zero-mean dynamic read noise over stochastic samples while reducing dependence on high-resolution ADCs. We provide a unified robustness analysis showing that dynamic read noise is suppressed through temporal averaging and that spatial input-bitstream correlation increases instantaneous current variance rather than introducing first-order MAC bias. MAC-level experiments and end-to-end evaluation on ViT-Base validate the analysis: under read noise, Top-1 accuracy remains 84.48% near the 84.51% bfloat16 (BF16) baseline; under stochastic number generator (SNG) reuse, MAC bias stays near zero while root-mean-square error (RMSE) and stochastic cross-correlation (SCC) grow as predicted.

Key facts. No citing papers in the map yet (data through 14 Oct 2026). Builds on 3 of its 23 references that are in the map. First posted on arXiv 7 Sep 2026.

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3 of 23 references.

References · 3

  1. 2017Quantization and Training of Neural Networks for Efficient Integer-Arithmetic-Only Inferencecited by 1,593
  2. 2024ASiM: Modeling and Analyzing Inference Accuracy of SRAM-Based Analog CiM Circuitscited by 4
  3. 2024StoX-Net: Stochastic Processing of Partial Sums for Efficient In-Memory Computing DNN Acceleratorscited by 2

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  1. 2026Selective KV Cache Protection for Noise-Resilient LLM Inference on Analog Compute-In-Memory Systems
  2. 2026NANQ: Noise-Floor-Aware Mixed-Precision Non-Uniform Quantization for Analog Compute-in-Memory
  3. 2025Extending Straight-Through Estimation for Robust Neural Networks on Analog CIM Hardware
  4. 2025Rapid yet accurate Tile-circuit and device modeling for Analog In-Memory Computing
  5. 2026ASSERT: Adaptive Stochastic Sampling for Robust Diffusion Models on Analog Compute-in-Memory Hardware
  6. 2025Analog Foundation Models
  7. 2025Compute SNR-Optimal Analog-to-Digital Converters for Analog In-Memory Computing
  8. 2022A 65nm 8b-Activation 8b-Weight SRAM-Based Charge-Domain Computing-in-Memory Macro Using A Fully-Parallel Analog Adder Network and A Single-ADC Interface