Syn2Logic: End-to-End Neuromorphic Design Automation
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Abstract (arXiv)
In this work, we propose a view on electronic Neuromorphic Design Automation (eNDA), which we see as a design automation flow that bridges computational neuroscience modeling with traditional Electronic Design Automation (EDA) flow. We introduce the term, give examples of how it can be implemented, and design a prototype implementation: Syn2Logic. Syn2Logic is an entire eNDA framework, that allows neuroscientists to model neural behavior using a custom DSL and a compiler that takes the same model description down to synthesizable RTL hardware. We end the paper by applying the eNDA-flow through Syn2Logic to show how to -- without writing a single line of hardware description language (HDL) code-- (i) generate what we believe is the fastest C. elegans accelerator that runs significantly faster than state-of-the-art simulators, (ii) create (to the best of our knowledge) the fastest, most generic neuromorphic sudoku solver that outperforms CP-SAT and SCIP on TOP1465 puzzles, (iii) create a 5.6 million FPS/Watt accelerator on a tiny FPGA that outperforms existing neuromorphic architectures in terms of speed and energy-efficiency on the MNIST dataset, and (iv) create a generic accelerator for unsupervised learning that outperforms most existing unsupervised methods on the OPS-SAT benchmark.
Key facts. No citing papers in the map yet (data through 14 Oct 2026). Builds on 20 of its 86 references that are in the map. First posted on arXiv 26 Aug 2026.
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References · 20
- 2021Training Spiking Neural Networks Using Lessons From Deep Learningcited by 259
- 2023SpikingJelly: An open-source machine learning infrastructure platform for spike-based intelligencecited by 169
- 2017A Survey of Neuromorphic Computing and Neural Networks in Hardwarecited by 85
- 2022The BrainScaleS-2 accelerated neuromorphic system with hybrid plasticitycited by 42
- 2023Neuromorphic Intermediate Representation: A Unified Instruction Set for Interoperable Brain-Inspired Computingcited by 22
- 2024Spiker+: a framework for the generation of efficient Spiking Neural Networks FPGA accelerators for inference at the edgecited by 18
- 2021The SpiNNaker 2 Processing Element Architecture for Hybrid Digital Neuromorphic Computingcited by 14
- 2021E3NE: An End-to-End Framework for Accelerating Spiking Neural Networks with Emerging Neural Encoding on FPGAscited by 8
- 2024A Fully-Configurable Open-Source Software-Defined Digital Quantized Spiking Neural Core Architecturecited by 8
- 2023FireFly v2: Advancing Hardware Support for High-Performance Spiking Neural Network with a Spatiotemporal FPGA Acceleratorcited by 7
- 2024The OPS-SAT benchmark for detecting anomalies in satellite telemetrycited by 7
- 2019Composing Neural Algorithms with Fugucited by 6
8 more
- 2020RANC: Reconfigurable Architecture for Neuromorphic Computingcited by 6
- 2022Efficient Hardware Acceleration of Sparsely Active Convolutional Spiking Neural Networkscited by 5
- 2023DeepFire2: A Convolutional Spiking Neural Network Accelerator on FPGAscited by 4
- 2025A Quarter of a Century of Neuromorphic Architectures on FPGAs -- an Overviewcited by 2
- 2025IzhiRISC-V -- a RISC-V-based Processor with Custom ISA Extension for Spiking Neuron Networks Processing with Izhikevich Neuronscited by 1
- 2025Neuromorphic Simulation of Drosophila Melanogaster Brain Connectome on Loihi 2cited by 1
- 2026Dynamic Heuristic Neuromorphic Solver for the Edge User Allocation Problem with Bayesian Confidence Propagation Neural Networkcited by 1
- 2026Spiking Neural Network inference on FPGAs with hls4mlcited by 1
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