mlsanityData to 14 Oct 2026

BigPower: Hierarchical Source-Level Module Power Estimation for CPUs with Large Language Models

arXiv 2606.13747 ↗First posted 11 Jun 2026cs.AR cs.LGcited by 0

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Abstract (arXiv)

Accurate power estimation is important for understanding and optimizing CPU power behavior, yet practical workflows often rely on simulation-derived information or post-silicon analysis. In this work, we present BigPower, a hierarchical source-level surrogate model for fine-grained module-level power estimation during CPU design. BigPower leverages large language model-based representations together with architectural hierarchy, module connectivity, configuration parameters, and workload context to estimate module-level power consumption directly from source-level design information, without requiring additional simulation during inference. Experimental results in the open-source XiangShan processor family demonstrate practical fine-grained power estimation across diverse configurations and workloads, offering an efficient alternative to conventional simulation-based workflows.

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References · 13

  1. 2017Attention Is All You Needcited by 60,361
  2. 2023LLaMA: Open and Efficient Foundation Language Modelscited by 14,132
  3. 2019ZeRO: Memory Optimizations Toward Training Trillion Parameter Modelscited by 1,301
  4. 2023Large Language Models Are Zero-Shot Time Series Forecasterscited by 500
  5. 2023VerilogEval: Evaluating Large Language Models for Verilog Code Generationcited by 252
  6. 2024Towards LLM-Powered Verilog RTL Assistant: Self-Verification and Self-Correctioncited by 39
  7. 2024VerilogReader: LLM-Aided Hardware Test Generationcited by 17
  8. 2022PowerGear: Early-Stage Power Estimation in FPGA HLS via Heterogeneous Edge-Centric GNNscited by 10
  9. 2025Exploring Code Language Models for Automated HLS-based Hardware Generation: Benchmark, Infrastructure and Analysiscited by 10
  10. 2025LLM-DSE: Searching Accelerator Parameters with LLM Agentscited by 10
  11. 2025TimelyHLS: LLM-Based Timing-Aware and Architecture-Specific FPGA HLS Optimizationcited by 5
  12. 2023PANDA: Architecture-Level Power Evaluation by Unifying Analytical and Machine Learning Solutionscited by 3
1 more
  1. 2024FirePower: Towards a Foundation with Generalizable Knowledge for Architecture-Level Power Modelingcited by 2

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