SwiftCTS: Fast Cross-Design Prediction and Pareto Optimization of Clock Tree Metrics via Few-Shot Calibration
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Abstract (arXiv)
Clock Tree Synthesis (CTS) is a computationally expensive stage in the physical design flow, requiring iterative EDA tool invocations to navigate a vast configuration space for optimal power, wirelength, and timing skew. Existing machine learning approaches require computationally expensive retraining or fine-tuning cycles to adapt to unseen macro architectures and are architecturally mismatched to the millions of evaluations demanded by exhaustive combinatorial search. We present SwiftCTS, a physics-informed surrogate framework that addresses both limitations simultaneously. By coupling lightweight, physics-grounded statistical features with gradient-boosted ensembles, SwiftCTS trains in under five seconds on a CPU and delivers sub-millisecond inference without GPU support. To handle out-of-distribution (OOD) designs without retraining or fine-tuning, we introduce a K-shot multiplicative calibration mechanism that anchors predictions to just one or two physical reference runs, reducing power prediction error from 24.5% to 3.3% and wirelength error from 56.6% to under 1% on unseen macros. Integrating this engine with an evolutionary optimizer, SwiftCTS evaluates 100,000 CTS configurations in under ten seconds, yielding Pareto-optimal frontiers that are physically validated within the OpenROAD flow. Closed-loop validation confirms prediction errors below 0.5% for power and wirelength, and timing skew predictions within five picoseconds on an OOD benchmark, consistently outperforming default tool heuristics across all target metrics. Code publicly available at: hrefhttps://anonymous.4open.science/r/SwiftCTS-7E6Ehttps://github.com/BarsatKhadka/SwiftCTS
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References · 6
- 2016XGBoost: A Scalable Tree Boosting Systemcited by 5,120
- 2023ChatEDA: A Large Language Model Powered Autonomous Agent for EDAcited by 118
- 2021Generalizable Cross-Graph Embedding for GNN-based Congestion Predictioncited by 17
- 2025Spec2RTL-Agent: Automated Hardware Code Generation from Complex Specifications Using LLM Agent Systemscited by 17
- 2026Report for NSF Workshop on AI for Electronic Design Automationcited by 1
- 2026CTS-Bench: Benchmarking Graph Coarsening Trade-offs for GNNs in Clock Tree Synthesiscited by 1
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