mlsanityData to 14 Oct 2026

Platinum: Path-Adaptable LUT-Based Accelerator Tailored for Low-Bit Weight Matrix Multiplication

arXiv 2511.21910 ↗First posted 26 Nov 2025cs.ARcited by 2

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Abstract (arXiv)

The rapid scaling of large language models demands more efficient hardware. Quantization offers a promising trade-off between efficiency and performance. With ultra-low-bit quantization, there are abundant opportunities for results reuse, and thus it can be boosted with lookup tables (LUTs) based acceleration. However, existing LUT-based methods suffer from computation and hardware overheads for LUT construction, and rely solely on bit-serial computation, which is suboptimal for ternary-weight networks. We propose Platinum, a lightweight ASIC accelerator for integer weight mixed-precision matrix multiplication (mpGEMM) using LUTs. Platinum reduces LUT construction overhead via offline-generated construction paths and supports both general bit-serial and optimized ternary-weight execution through adaptive path switching. On BitNet b1.58-3B, Platinum achieves up to 73.6x, 4.09x, and 2.15x speedups over SpikingEyeriss, Prosperity, and 16-thread T-MAC (CPU), respectively, along with energy reductions of 32.4x, 3.23x, and 20.9x, all within a 0.96mm2 chip area. This demonstrates the potential of LUT-based ASICs as efficient, scalable solutions for ultra-low-bit neural networks on edge platforms.

Key facts. Cited by 2 papers in the map (data through 14 Oct 2026). Builds on 19 of its 29 references that are in the map. First posted on arXiv 26 Nov 2025.

Builds on

19 of 29 references.

References · 19

  1. 2023LLaMA: Open and Efficient Foundation Language Modelscited by 14,132
  2. 2023Llama 2: Open Foundation and Fine-Tuned Chat Modelscited by 13,028
  3. 2022GPTQ: Accurate Post-Training Quantization for Generative Pre-trained Transformerscited by 1,919
  4. 2019Megatron-LM: Training Multi-Billion Parameter Language Models Using Model Parallelismcited by 1,868
  5. 2024The Era of 1-bit LLMs: All Large Language Models are in 1.58 Bitscited by 308
  6. 2023BitNet: Scaling 1-bit Transformers for Large Language Modelscited by 189
  7. 2022LUT-GEMM: Quantized Matrix Multiplication based on LUTs for Efficient Inference in Large-Scale Generative Language Modelscited by 105
  8. 2023OliVe: Accelerating Large Language Models via Hardware-friendly Outlier-Victim Pair Quantizationcited by 92
  9. 2023FP8-LM: Training FP8 Large Language Modelscited by 77
  10. 2024T-MAC: CPU Renaissance via Table Lookup for Low-Bit LLM Deployment on Edgecited by 55
  11. 2022ANT: Exploiting Adaptive Numerical Data Type for Low-bit Deep Neural Network Quantizationcited by 51
  12. 2024A Survey: Collaborative Hardware and Software Design in the Era of Large Language Modelscited by 23
7 more
  1. 2025Bitnet.cpp: Efficient Edge Inference for Ternary LLMscited by 22
  2. 2020BiQGEMM: Matrix Multiplication with Lookup Table For Binary-Coding-based Quantized DNNscited by 21
  3. 2024BitMoD: Bit-serial Mixture-of-Datatype LLM Accelerationcited by 18
  4. 2025Ecco: Improving Memory Bandwidth and Capacity for LLMs via Entropy-aware Cache Compressioncited by 14
  5. 2025Transitive Array: An Efficient GEMM Accelerator with Result Reusecited by 7
  6. 2025Prosperity: Accelerating Spiking Neural Networks via Product Sparsitycited by 6
  7. 2025Phi: Leveraging Pattern-based Hierarchical Sparsity for High-Efficiency Spiking Neural Networkscited by 5

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Cited by year (2026 to 14 Oct)

Citing papers per year: 2026: 2.

2 papers.

  1. 2026EVA: Accelerating LLM Decoding via an Efficient Vector Quantization Architecturecited by 2
  2. 2026Vortex: Bridging Extreme Compression and Efficient LLM Inferencecited by 0

Similar, not cited

Close in wording, no citation either way

  1. 2025FIGLUT: An Energy-Efficient Accelerator Design for FP-INT GEMM Using Look-Up Tables
  2. 2025PacQ: A SIMT Microarchitecture for Efficient Dataflow in Hyper-asymmetric GEMMs
  3. 2025HALO: Hardware-aware quantization with low critical-path-delay weights for LLM acceleration
  4. 2026Hardware Generation and Exploration of Lookup Table-Based Accelerators for 1.58-bit LLM Inference
  5. 2026W4A16 Mixed-Precision Matrix Multiplication on Decoupled Architecture: Kernel Design and Memory Bottleneck Analysis for Ascend NPUs
  6. 2024LUT Tensor Core: A Software-Hardware Co-Design for LUT-Based Low-Bit LLM Inference
  7. 2025TeLLMe v2: An Efficient End-to-End Ternary LLM Prefill and Decode Accelerator with Table-Lookup Matmul on Edge FPGAs
  8. 2026D-Legion: A Scalable Many-Core Architecture for Accelerating Matrix Multiplication in Quantized LLMs