Transitive Array: An Efficient GEMM Accelerator with Result Reuse
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Abstract (arXiv)
Deep Neural Networks (DNNs) and Large Language Models (LLMs) have revolutionized artificial intelligence, yet their deployment faces significant memory and computational challenges, especially in resource-constrained environments. Quantization techniques have mitigated some of these issues by reducing data precision, primarily focusing on General Matrix Multiplication (GEMM). This study introduces a novel sparsity paradigm, transitive sparsity, which leverages the reuse of previously computed results to substantially minimize computational overhead in GEMM operations. By representing transitive relations using a directed acyclic graph, we develop an efficient strategy for determining optimal execution orders, thereby overcoming inherent challenges related to execution dependencies and parallelism. Building on this foundation, we present the Transitive Array, a multiplication-free accelerator designed to exploit transitive sparsity in GEMM. Our architecture effectively balances computational workloads across multiple parallel lanes, ensuring high efficiency and optimal resource utilization. Comprehensive evaluations demonstrate that the Transitive Array achieves approximately 7.46× and 3.97× speedup and 2.31× and 1.65× energy reduction compared to state-of-the-art accelerators such as Olive and BitVert while maintaining comparable model accuracy on LLaMA models.
Key facts. Cited by 7 papers in the map (data through 14 Oct 2026). First posted on arXiv 23 Apr 2025.
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Citing papers per year: 2025: 5; 2026: 2.
7 papers.
- 2025Phi: Leveraging Pattern-based Hierarchical Sparsity for High-Efficiency Spiking Neural Networkscited by 5
- 2025Focus: A Streaming Concentration Architecture for Efficient Vision-Language Modelscited by 3
- 2025Platinum: Path-Adaptable LUT-Based Accelerator Tailored for Low-Bit Weight Matrix Multiplicationcited by 2
- 2026EVA: Accelerating LLM Decoding via an Efficient Vector Quantization Architecturecited by 2
- 2025FaRAccel: FPGA-Accelerated Defense Architecture for Efficient Bit-Flip Attack Resilience in Transformer Modelscited by 1
- 2025BitStopper: An Efficient Transformer Attention Accelerator via Stage-fusion and Early Terminationcited by 1
- 2026Vortex: Bridging Extreme Compression and Efficient LLM Inferencecited by 0
- 2026Vortex: Bridging Extreme Compression and Efficient LLM Inference10 Sep 2026
- 2026EVA: Accelerating LLM Decoding via an Efficient Vector Quantization Architecture22 May 2026
- 2025Focus: A Streaming Concentration Architecture for Efficient Vision-Language Models16 Dec 2025
- 2025BitStopper: An Efficient Transformer Attention Accelerator via Stage-fusion and Early Termination6 Dec 2025
- 2025Platinum: Path-Adaptable LUT-Based Accelerator Tailored for Low-Bit Weight Matrix Multiplication26 Nov 2025
- 2025FaRAccel: FPGA-Accelerated Defense Architecture for Efficient Bit-Flip Attack Resilience in Transformer Models28 Oct 2025
- 2025Phi: Leveraging Pattern-based Hierarchical Sparsity for High-Efficiency Spiking Neural Networks16 May 2025
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- 2024Panacea: Novel DNN Accelerator using Accuracy-Preserving Asymmetric Quantization and Energy-Saving Bit-Slice Sparsity
- 2025FlexiSAGA: A Flexible Systolic Array GEMM Accelerator for Sparse and Dense Processing
- 2025APT-LLM: Exploiting Arbitrary-Precision Tensor Core Computing for LLM Acceleration
- 2025Accelerating Sparse Ternary GEMM for Quantized ML on Apple Silicon
- 2024tubGEMM: Energy-Efficient and Sparsity-Effective Temporal-Unary-Binary Based Matrix Multiply Unit
- 2026SSR: Sparse Segment Reduction for Ternary GEMM Acceleration
- 2025SparAMX: Accelerating Compressed LLMs Token Generation on AMX-powered CPUs
- 2024An Efficient Matrix Multiplication Algorithm for Accelerating Inference in Binary and Ternary Neural Networks