Enabling Vibration-Based Gesture Recognition on Everyday Furniture via Energy-Efficient FPGA Implementation of 1D Convolutional Networks
Not on the map. Why?
Abstract (arXiv)
The growing demand for smart home interfaces has increased interest in non-intrusive sensing methods like vibration-based gesture recognition. While prior studies demonstrated feasibility, they often rely on complex preprocessing and large Neural Networks (NNs) requiring costly high-performance hardware, resulting in high energy usage and limited real-world deployability. This study proposes an energy-efficient solution deploying compact NNs on low-power Field-Programmable Gate Arrays (FPGAs) to enable real-time gesture recognition with competitive accuracy. We adopt a series of optimizations: (1) We replace complex spectral preprocessing with raw waveform input, eliminating complex on-board preprocessing while reducing input size by 21x without sacrificing accuracy. (2) We design two lightweight architectures (1D-CNN and 1D-SepCNN) tailored for embedded FPGAs, reducing parameters from 369 million to as few as 216 while maintaining comparable accuracy. (3) With integer-only quantization and automated RTL generation, we achieve seamless FPGA deployment. A ping-pong buffering mechanism in 1D-SepCNN further improves deployability under tight memory constraints. (4) We extend a hardware-aware search framework to support constraint-driven model configuration selection, considering accuracy, deployability, latency, and energy consumption. Evaluated on two swipe-direction datasets with multiple users and ordinary tables, our approach achieves low-latency, energy-efficient inference on the AMD Spartan-7 XC7S25 FPGA. Under the PS data splitting setting, the selected 6-bit 1D-CNN reaches 0.970 average accuracy across users with 9.22 ms latency. The chosen 8-bit 1D-SepCNN further reduces latency to 6.83 ms (over 53x CPU speedup) with slightly lower accuracy (0.949). Both consume under 1.2 mJ per inference, demonstrating suitability for long-term edge operation.
Key facts. No citing papers in the map yet (data through 13 Oct 2026). Builds on 8 of its 26 references that are in the map. First posted on arXiv 27 Oct 2025.
Builds on
8 of 26 references.
References · 8
- 2017Quantization and Training of Neural Networks for Efficient Integer-Arithmetic-Only Inferencecited by 1,585
- 2018Quantizing deep convolutional networks for efficient inference: A whitepapercited by 518
- 2021Efficient Deep Learning: A Survey on Making Deep Learning Models Smaller, Faster, and Bettercited by 154
- 2024Integer-only Quantized Transformers for Embedded FPGA-based Time-series Forecasting in AIoTcited by 6
- 2024FlowPrecision: Advancing FPGA-Based Real-Time Fluid Flow Estimation with Linear Quantizationcited by 5
- 2024ElasticAI: Creating and Deploying Energy-Efficient Deep Learning Accelerator for Pervasive Computingcited by 5
- 2025Automating Versatile Time-Series Analysis with Tiny Transformers on Embedded FPGAscited by 4
- 2023BearingPGA-Net: A Lightweight and Deployable Bearing Fault Diagnosis Network via Decoupled Knowledge Distillation and FPGA Accelerationcited by 2
Built on by
Not cited yet.
Similar, not cited
Close in wording, no citation either way
- 2025Efficient Deployment of Spiking Neural Networks on SpiNNaker2 for DVS Gesture Recognition Using Neuromorphic Intermediate Representation
- 2026MAUPITI: On-Device Prototype-Based Learning on a Smart Infrared Sensor
- 2025Energy-Efficient FPGA Framework for Non-Quantized Convolutional Neural Networks
- 2024Real-time Event Recognition of Long-distance Distributed Vibration Sensing with Knowledge Distillation and Hardware Acceleration
- 2024Forearm Ultrasound based Gesture Recognition on Edge
- 2023The Hardware Impact of Quantization and Pruning for Weights in Spiking Neural Networks
- 2025WaveFormer: A Lightweight Transformer Model for sEMG-based Gesture Recognition
- 2025SFATTI: Spiking FPGA Accelerator for Temporal Task-driven Inference -- A Case Study on MNIST