mlsanityData to 14 Oct 2026

SFATTI: Spiking FPGA Accelerator for Temporal Task-driven Inference -- A Case Study on MNIST

arXiv 2507.10561 ↗First posted 4 Jul 2025cs.NE cs.CVcited by 2

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Abstract (arXiv)

Hardware accelerators are essential for achieving low-latency, energy-efficient inference in edge applications like image recognition. Spiking Neural Networks (SNNs) are particularly promising due to their event-driven and temporally sparse nature, making them well-suited for low-power Field Programmable Gate Array (FPGA)-based deployment. This paper explores using the open-source Spiker+ framework to generate optimized SNNs accelerators for handwritten digit recognition on the MNIST dataset. Spiker+ enables high-level specification of network topologies, neuron models, and quantization, automatically generating deployable HDL. We evaluate multiple configurations and analyze trade-offs relevant to edge computing constraints.

Key facts. Cited by 2 papers in the map (data through 14 Oct 2026). Builds on 8 of its 23 references that are in the map. First posted on arXiv 4 Jul 2025.

Builds on

8 of 23 references.

References · 8

  1. 2019Optuna: A Next-generation Hyperparameter Optimization Frameworkcited by 2,501
  2. 2019Surrogate Gradient Learning in Spiking Neural Networkscited by 626
  3. 2017Spatio-Temporal Backpropagation for Training High-performance Spiking Neural Networkscited by 406
  4. 2021Training Spiking Neural Networks Using Lessons From Deep Learningcited by 259
  5. 2024Spiker+: a framework for the generation of efficient Spiking Neural Networks FPGA accelerators for inference at the edgecited by 18
  6. 2023FireFly: A High-Throughput Hardware Accelerator for Spiking Neural Networks with Efficient DSP and Memory Optimizationcited by 13
  7. 2021E3NE: An End-to-End Framework for Accelerating Spiking Neural Networks with Emerging Neural Encoding on FPGAscited by 8
  8. 2024SpikeExplorer: hardware-oriented Design Space Exploration for Spiking Neural Networks on FPGAcited by 3

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Cited by year (2026 to 14 Oct)

Citing papers per year: 2026: 2.

2 papers.

  1. 2026NeuroTrain: Surveying Local Learning Rules for Spiking Neural Networks with an Open Benchmarking Frameworkcited by 0
  2. 2026Spiker-LL: An Energy-Efficient FPGA Accelerator Enabling Adaptive Local Learning in Spiking Neural Networkscited by 0

Similar, not cited

Close in wording, no citation either way

  1. 2026A Time-Multiplexed Spiking Neural Network Accelerator with Pipelined Readout for FPGA Inference ↗
  2. 2024SpiDR: A Reconfigurable Digital Compute-in-Memory Spiking Neural Network Accelerator for Event-based Perception
  3. 2025Enabling Efficient Processing of Spiking Neural Networks with On-Chip Learning on Commodity Neuromorphic Processors for Edge AI Systems
  4. 2021A Competitive Edge: Can FPGAs Beat GPUs at DCNN Inference Acceleration in Resource-Limited Edge Computing Applications?
  5. 2025Implementation of high-efficiency, lightweight residual spiking neural network processor based on field-programmable gate arrays ↗
  6. 2026APEX: A Dual-Sparsity Accelerator for Precise and Efficient SNN Inference ↗
  7. 2026L-SPINE: A Low-Precision SIMD Spiking Neural Compute Engine for Resource-efficient Edge Inference
  8. 2023SNN Architecture for Differential Time Encoding Using Decoupled Processing Time