WaferLLM: Large Language Model Inference at Wafer Scale
On the map: Efficient LLM inference and serving → Serving systems and request scheduling
Abstract (arXiv)
Emerging AI accelerators increasingly adopt wafer-scale manufacturing technologies, integrating hundreds of thousands of AI cores in a mesh architecture with large distributed on-chip memory (tens of GB in total) and ultra-high on-chip memory bandwidth (tens of PB/s). However, current LLM inference systems, optimized for shared memory architectures like GPUs, fail to exploit these accelerators fully. We introduce WaferLLM, the first wafer-scale LLM inference system. WaferLLM is guided by a novel PLMR model (pronounced as "Plummer") that captures the unique hardware characteristics of wafer-scale architectures. Leveraging this model, WaferLLM pioneers wafer-scale LLM parallelism, optimizing the utilization of hundreds of thousands of on-chip cores. It also introduces MeshGEMM and MeshGEMV, the first GEMM and GEMV implementations designed to scale effectively on wafer-scale accelerators. Evaluations show that WaferLLM achieves up to 200× higher accelerator utilization than state-of-the-art methods. Leveraging a wafer-scale accelerator (Cerebras WSE2), WaferLLM delivers GEMV operations 606× faster and 16× more energy-efficient than on an NVIDIA A100 GPU. For full LLM inference, WaferLLM achieves 10-20× speedups over A100 GPU clusters running SGLang and vLLM. These advantages are expected to grow as wafer-scale AI models, software, and hardware continue to mature. WaferLLM is open-sourced at https://github.com/MeshInfra/WaferLLM.
Key facts. Cited by 13 papers in the map (data through 13 Oct 2026). Placed in Serving systems and request scheduling, one of 12 directions in Efficient LLM inference and serving. Builds on 16 of its 52 references that are in the map. First posted on arXiv 6 Feb 2025.
Builds on
16 of 52 references.
Closest ancestors · 3
Same direction, newest first
- 2024LoongServe: Efficiently Serving Long-Context Large Language Models with Elastic Sequence Parallelism15 Apr
- 2024DistServe: Disaggregating Prefill and Decoding for Goodput-optimized Large Language Model Serving18 Jan
- 2023FlashDecoding++: Faster Large Language Model Inference on GPUs2 Nov
Other references · 13
- 2017Attention Is All You Needcited by 60,106
- 2020Language Models are Few-Shot Learnerscited by 32,320
- 2025DeepSeek-R1: Incentivizing Reasoning Capability in LLMs via Reinforcement Learningcited by 6,247
- 2023Efficient Memory Management for Large Language Model Serving with PagedAttentioncited by 5,831
- 2023FlashAttention-2: Faster Attention with Better Parallelism and Work Partitioningcited by 2,570
- 2023GQA: Training Generalized Multi-Query Transformer Models from Multi-Head Checkpointscited by 1,323
- 2023SGLang: Efficient Execution of Structured Language Model Programscited by 1,117
- 2021Efficient Large-Scale Language Model Training on GPU Clusters Using Megatron-LMcited by 626
- 2022Efficiently Scaling Transformer Inferencecited by 532
- 2021TENET: A Framework for Modeling Tensor Dataflow Based on Relation-centric Notationcited by 9
- 2022DISTAL: The Distributed Tensor Algebra Compilercited by 6
- 2024Scaling Deep Learning Computation over the Inter-Core Connected Intelligence Processor with T10cited by 5
1 more
- 2024Near-Optimal Wafer-Scale Reducecited by 1
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Citing papers per year: 2025: 5; 2026: 8.
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- 2025Agentic AI Home Energy Management System: A Large Language Model Framework for Residential Load Schedulingcited by 8
- 2025ContextPilot: Fast Long-Context Inference via Context Reusecited by 8
- 2025Patterns behind Chaos: Forecasting Data Movement for Efficient Large-Scale MoE LLM Inferencecited by 6
- 2025A Theory of Inference Compute Scaling: Reasoning through Directed Stochastic Skill Searchcited by 5
- 2026A Persistent-State Dataflow Accelerator for Memory-Bound Linear Attention Decode on FPGAcited by 3
- 2026Agentic Witnessing: Pragmatic and Scalable TEE-Enabled Privacy-Preserving Auditingcited by 3
- 2026SmartGen: Seamless Disaggregated LLM Inference with Selective KV Cache Transfercited by 2
- 2025Systematic Exploration of Multi-core Architectures for Efficient LLM Serving using WaferAI-SIMcited by 0
- 2026Expert Streaming: Accelerating Low-Batch MoE Inference via Multi-chiplet Architecture and Dynamic Expert Trajectory Schedulingcited by 0
- 2026KV-RM: Regularizing KV-Cache Movement for Static-Graph LLM Servingcited by 0
- 2026MOCAP: Wafer-Scale-Chip-Oriented Memory-Orchestrated Chunked Pipelining Framework for Prefill-Only LLM Inferencecited by 0
- 2026Cache-Resident LLM Inference in GB-Scale Last-Level Cachescited by 0
1 more
- 2026Vortex: Bridging Extreme Compression and Efficient LLM Inference10 Sep 2026
- 2026SmartGen: Seamless Disaggregated LLM Inference with Selective KV Cache Transfer30 Jul 2026
- 2026Cache-Resident LLM Inference in GB-Scale Last-Level Caches24 Jun 2026
- 2026MOCAP: Wafer-Scale-Chip-Oriented Memory-Orchestrated Chunked Pipelining Framework for Prefill-Only LLM Inference22 Jun 2026
- 2026KV-RM: Regularizing KV-Cache Movement for Static-Graph LLM Serving10 May 2026
- 2026Agentic Witnessing: Pragmatic and Scalable TEE-Enabled Privacy-Preserving Auditing27 Apr 2026
- 2026Expert Streaming: Accelerating Low-Batch MoE Inference via Multi-chiplet Architecture and Dynamic Expert Trajectory Scheduling29 Mar 2026
- 2026A Persistent-State Dataflow Accelerator for Memory-Bound Linear Attention Decode on FPGA6 Mar 2026
- 2025ContextPilot: Fast Long-Context Inference via Context Reuse5 Nov 2025
- 2025Agentic AI Home Energy Management System: A Large Language Model Framework for Residential Load Scheduling30 Oct 2025
- 2025Systematic Exploration of Multi-core Architectures for Efficient LLM Serving using WaferAI-SIM7 Oct 2025
- 2025Patterns behind Chaos: Forecasting Data Movement for Efficient Large-Scale MoE LLM Inference7 Oct 2025
- 2025ContextPilot: Fast Long-Context Inference via Context Reusecited by 8
- 2026A Persistent-State Dataflow Accelerator for Memory-Bound Linear Attention Decode on FPGAcited by 3
- 2026SmartGen: Seamless Disaggregated LLM Inference with Selective KV Cache Transfercited by 2
- 2025Systematic Exploration of Multi-core Architectures for Efficient LLM Serving using WaferAI-SIMcited by 0
- 2026KV-RM: Regularizing KV-Cache Movement for Static-Graph LLM Servingcited by 0
- 2026MOCAP: Wafer-Scale-Chip-Oriented Memory-Orchestrated Chunked Pipelining Framework for Prefill-Only LLM Inferencecited by 0
- 2026Cache-Resident LLM Inference in GB-Scale Last-Level Cachescited by 0
- 2026Vortex: Bridging Extreme Compression and Efficient LLM Inferencecited by 0
- 2026Vortex: Bridging Extreme Compression and Efficient LLM Inference10 Sep 2026
- 2026SmartGen: Seamless Disaggregated LLM Inference with Selective KV Cache Transfer30 Jul 2026
- 2026Cache-Resident LLM Inference in GB-Scale Last-Level Caches24 Jun 2026
- 2026MOCAP: Wafer-Scale-Chip-Oriented Memory-Orchestrated Chunked Pipelining Framework for Prefill-Only LLM Inference22 Jun 2026
- 2026KV-RM: Regularizing KV-Cache Movement for Static-Graph LLM Serving10 May 2026
- 2026A Persistent-State Dataflow Accelerator for Memory-Bound Linear Attention Decode on FPGA6 Mar 2026
- 2025ContextPilot: Fast Long-Context Inference via Context Reuse5 Nov 2025
- 2025Systematic Exploration of Multi-core Architectures for Efficient LLM Serving using WaferAI-SIM7 Oct 2025
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