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SiHGNN: Leveraging Properties of Semantic Graphs for Efficient HGNN Acceleration

arXiv 2408.15089 ↗First posted 27 Aug 2024cs.AR cs.LGcited by 0

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Abstract (arXiv)

Heterogeneous Graph Neural Networks (HGNNs) have expanded graph representation learning to heterogeneous graph fields. Recent studies have demonstrated their superior performance across various applications, including medical analysis and recommendation systems, often surpassing existing methods. However, GPUs often experience inefficiencies when executing HGNNs due to their unique and complex execution patterns. Compared to traditional Graph Neural Networks, these patterns further exacerbate irregularities in memory access. To tackle these challenges, recent studies have focused on developing domain-specific accelerators for HGNNs. Nonetheless, most of these efforts have concentrated on optimizing the datapath or scheduling data accesses, while largely overlooking the potential benefits that could be gained from leveraging the inherent properties of the semantic graph, such as its topology, layout, and generation. In this work, we focus on leveraging the properties of semantic graphs to enhance HGNN performance. First, we analyze the Semantic Graph Build (SGB) stage and identify significant opportunities for data reuse during semantic graph generation. Next, we uncover the phenomenon of buffer thrashing during the Graph Feature Processing (GFP) stage, revealing potential optimization opportunities in semantic graph layout. Furthermore, we propose a lightweight hardware accelerator frontend for HGNNs, called SiHGNN. This accelerator frontend incorporates a tree-based Semantic Graph Builder for efficient semantic graph generation and features a novel Graph Restructurer for optimizing semantic graph layouts. Experimental results show that SiHGNN enables the state-of-the-art HGNN accelerator to achieve an average performance improvement of 2.95×.

Key facts. No citing papers in the map yet (data through 7 Oct 2026). Builds on 34 of its 58 references that are in the map. First posted on arXiv 27 Aug 2024.

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References · 34

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22 more
  1. 2020GCN-RL Circuit Designer: Transferable Transistor Sizing with Graph Neural Networks and Reinforcement Learningcited by 89
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  19. 2022Characterizing and Understanding HGNNs on GPUscited by 3
  20. 2023HiHGNN: Accelerating HGNNs through Parallelism and Data Reusability Exploitationcited by 3
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  22. 2024Characterizing and Understanding HGNN Training on GPUscited by 1

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