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Advancing Neuromorphic Computing: Mixed-Signal Design Techniques Leveraging Brain Code Units and Fundamental Code Units

arXiv 2403.11563 ↗First posted 18 Mar 2024cs.AR cs.LG cs.NEcited by 0

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Abstract (arXiv)

This paper introduces a groundbreaking digital neuromorphic architecture that innovatively integrates Brain Code Unit (BCU) and Fundamental Code Unit (FCU) using mixedsignal design methodologies. Leveraging open-source datasets and the latest advances in materials science, our research focuses on enhancing the computational efficiency, accuracy, and adaptability of neuromorphic systems. The core of our approach lies in harmonizing the precision and scalability of digital systems with the robustness and energy efficiency of analog processing. Through experimentation, we demonstrate the effectiveness of our system across various metrics. The BCU achieved an accuracy of 88.0% and a power efficiency of 20.0 GOP/s/W, while the FCU recorded an accuracy of 86.5% and a power efficiency of 18.5 GOP/s/W. Our mixed-signal design approach significantly improved latency and throughput, achieving a latency as low as 0.75 ms and throughput up to 213 TOP/s. These results firmly establish the potential of our architecture in neuromorphic computing, providing a solid foundation for future developments in this domain. Our study underscores the feasibility of mixedsignal neuromorphic systems and their promise in advancing the field, particularly in applications requiring high efficiency and adaptability

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12 of 35 references.

References · 12

  1. 2020Surrogate gradients for analog neuromorphic computingcited by 38
  2. 2022Implementing Spiking Neural Networks on Neuromorphic Architectures: A Reviewcited by 15
  3. 2021Adversarial Attacks on Spiking Convolutional Neural Networks for Event-based Visioncited by 14
  4. 2017Algorithm and Hardware Design of Discrete-Time Spiking Neural Networks Based on Back Propagation with Binary Activationscited by 7
  5. 2022Kraken: A Direct Event/Frame-Based Multi-sensor Fusion SoC for Ultra-Efficient Visual Processing in Nano-UAVscited by 7
  6. 2023A Survey of Spiking Neural Network Accelerator on FPGAcited by 7
  7. 2023An Energy-Efficient Reconfigurable Autoencoder Implementation on FPGAcited by 5
  8. 2023Neuromorphic analog circuits for robust on-chip always-on learning in spiking neural networkscited by 5
  9. 2022A Design Methodology for Fault-Tolerant Computing using Astrocyte Neural Networkscited by 4
  10. 2023Astrocyte-Integrated Dynamic Function Exchange in Spiking Neural Networkscited by 3
  11. 2024NEUROSEC: FPGA-Based Neuromorphic Audio Securitycited by 2
  12. 2022BrainTTA: A 35 fJ/op Compiler Programmable Mixed-Precision Transport-Triggered NN SoCcited by 1

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