mlsanityData to 7 Oct 2026

An Updated Assessment of Reinforcement Learning for Macro Placement

arXiv 2302.11014 ↗First posted 21 Feb 2023cs.LG cs.AIcited by 11

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Abstract (arXiv)

We provide an improved assessment of Google Brain's deep reinforcement learning approach to macro placement and its updated Circuit Training (CT) implementation in GitHub. A stronger simulated annealing (SA) baseline leverages the "go-with-the-winners" metaheuristic and a multi-threading implementation. We develop and release new public benchmarks in sub-10nm technology: LEF/DEF for Google's 7nm TSMC Ariane protobuf and scaled variants, as well as testcases implemented in the open-source ASAP7 7nm research enablement. We evaluate from-scratch training and fine-tuning results for the latest "AlphaChip" release of Circuit Training, alongside multiple alternative macro placers. We also study the recently-published pre-training guidance in. A commercial place-and-route tool is used to provide "true reward" post-route power, performance and area metrics. All data, evaluation flows and related scripts are publicly available in the MacroPlacement GitHub repository. Our study affords insights into reproducibility and reporting in the research literature, and points out still-missing confirmations (e.g., of CT's scalability and pre-training methodology) that remain open questions for the research community.

Key facts. Cited by 11 papers in the map (data through 7 Oct 2026). Builds on 2 of its 68 references that are in the map. First posted on arXiv 21 Feb 2023.

Builds on

2 of 68 references.

References · 2

  1. 2021On Joint Learning for Solving Placement and Routing in Chip Designcited by 44
  2. 2022MaskPlace: Fast Chip Placement via Reinforced Visual Representation Learningcited by 43

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Cited by year (2026 to 7 Oct)

Citing papers per year: 2023: 2; 2024: 4; 2025: 2; 2026: 3.

11 papers.