mlsanityData to 14 Oct 2026

Real-time Hyper-Dimensional Reconfiguration at the Edge using Hardware Accelerators

arXiv 2206.05128 ↗First posted 10 Jun 2022cs.CV cs.ARcited by 2

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Abstract (arXiv)

In this paper we present Hyper-Dimensional Reconfigurable Analytics at the Tactical Edge (HyDRATE) using low-SWaP embedded hardware that can perform real-time reconfiguration at the edge leveraging non-MAC (free of floating-point MultiplyACcumulate operations) deep neural nets (DNN) combined with hyperdimensional (HD) computing accelerators. We describe the algorithm, trained quantized model generation, and simulated performance of a feature extractor free of multiply-accumulates feeding a hyperdimensional logic-based classifier. Then we show how performance increases with the number of hyperdimensions. We describe the realized low-SWaP FPGA hardware and embedded software system compared to traditional DNNs and detail the implemented hardware accelerators. We discuss the measured system latency and power, noise robustness due to use of learnable quantization and HD computing, actual versus simulated system performance for a video activity classification task and demonstration of reconfiguration on this same dataset. We show that reconfigurability in the field is achieved by retraining only the feed-forward HD classifier without gradient descent backpropagation (gradient-free), using few-shot learning of new classes at the edge. Initial work performed used LRCN DNN and is currently extended to use Two-stream DNN with improved performance.

Key facts. Cited by 2 papers in the map (data through 14 Oct 2026). Builds on 10 of its 23 references that are in the map. First posted on arXiv 10 Jun 2022.

Builds on

10 of 23 references.

References · 10

  1. 2015Deep Residual Learning for Image Recognitioncited by 52,096
  2. 2014Two-Stream Convolutional Networks for Action Recognition in Videoscited by 1,068
  3. 2021A Survey of Quantization Methods for Efficient Neural Network Inferencecited by 815
  4. 2014Long-term Recurrent Convolutional Networks for Visual Recognition and Descriptioncited by 484
  5. 2019FPGA/DNN Co-Design: An Efficient Design Methodology for IoT Intelligence on the Edgecited by 48
  6. 2020Mix and Match: A Novel FPGA-Centric Deep Neural Network Quantization Frameworkcited by 27
  7. 2015Recurrent Neural Networks Hardware Implementation on FPGAcited by 8
  8. 2016Caffeinated FPGAs: FPGA Framework For Convolutional Neural Networkscited by 8
  9. 2018Generalized Ternary Connect: End-to-End Learning and Compression of Multiplication-Free Deep Neural Networkscited by 3
  10. 2017BitNet: Bit-Regularized Deep Neural Networkscited by 2

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Citing papers per year: 2023: 1; 2024: 0; 2025: 1.

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  1. 2025Optimizing Neural Networks with Learnable Non-Linear Activation Functions via Lookup-Based FPGA Acceleration
  2. 2026ImageHD: Energy-Efficient On-Device Continual Learning of Visual Representations via Hyperdimensional Computing
  3. 2025FSL-HDnn: A 40 nm Few-shot On-Device Learning Accelerator with Integrated Feature Extraction and Hyperdimensional Computing ↗
  4. 2021Fast convolutional neural networks on FPGAs with hls4ml
  5. 2025Energy-Efficient FPGA Framework for Non-Quantized Convolutional Neural Networks
  6. 2024Kratos: An FPGA Benchmark for Unrolled DNNs with Fine-Grained Sparsity and Mixed Precision
  7. 2025FF-INT8: Efficient Forward-Forward DNN Training on Edge Devices with INT8 Precision
  8. 2021HAO: Hardware-aware neural Architecture Optimization for Efficient Inference