SeGraM: A Universal Hardware Accelerator for Genomic Sequence-to-Graph and Sequence-to-Sequence Mapping
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Abstract (arXiv)
A critical step of genome sequence analysis is the mapping of sequenced DNA fragments (i.e., reads) collected from an individual to a known linear reference genome sequence (i.e., sequence-to-sequence mapping). Recent works replace the linear reference sequence with a graph-based representation of the reference genome, which captures the genetic variations and diversity across many individuals in a population. Mapping reads to the graph-based reference genome (i.e., sequence-to-graph mapping) results in notable quality improvements in genome analysis. Unfortunately, while sequence-to-sequence mapping is well studied with many available tools and accelerators, sequence-to-graph mapping is a more difficult computational problem, with a much smaller number of practical software tools currently available. We analyze two state-of-the-art sequence-to-graph mapping tools and reveal four key issues. We find that there is a pressing need to have a specialized, high-performance, scalable, and low-cost algorithm/hardware co-design that alleviates bottlenecks in both the seeding and alignment steps of sequence-to-graph mapping. To this end, we propose SeGraM, a universal algorithm/hardware co-designed genomic mapping accelerator that can effectively and efficiently support both sequence-to-graph mapping and sequence-to-sequence mapping, for both short and long reads. To our knowledge, SeGraM is the first algorithm/hardware co-design for accelerating sequence-to-graph mapping. SeGraM consists of two main components: (1) MinSeed, the first minimizer-based seeding accelerator; and (2) BitAlign, the first bitvector-based sequence-to-graph alignment accelerator. We demonstrate that SeGraM provides significant improvements for multiple steps of the sequence-to-graph and sequence-to-sequence mapping pipelines.
Key facts. Cited by 4 papers in the map (data through 7 Oct 2026). First posted on arXiv 12 May 2022.
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Citing papers per year: 2022: 3; 2023: 0; 2024: 0; 2025: 1.
4 papers.
- 2025iDSE: Navigating Design Space Exploration in High-Level Synthesis Using LLMscited by 6
- 2022ApHMM: Accelerating Profile Hidden Markov Models for Fast and Energy-Efficient Genome Analysiscited by 2
- 2022Heterogeneous Data-Centric Architectures for Modern Data-Intensive Applications: Case Studies in Machine Learning and Databasescited by 1
- 2022LEAPER: Fast and Accurate FPGA-based System Performance Prediction via Transfer Learningcited by 1
- 2025iDSE: Navigating Design Space Exploration in High-Level Synthesis Using LLMs28 May 2025
- 2022LEAPER: Fast and Accurate FPGA-based System Performance Prediction via Transfer Learning22 Aug 2022
- 2022ApHMM: Accelerating Profile Hidden Markov Models for Fast and Energy-Efficient Genome Analysis20 Jul 2022
- 2022Heterogeneous Data-Centric Architectures for Modern Data-Intensive Applications: Case Studies in Machine Learning and Databases29 May 2022