Bolt: Bridging the Gap between Auto-tuners and Hardware-native Performance
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Abstract (arXiv)
Today's auto-tuners (e.g., AutoTVM, Ansor) generate efficient tensor programs by navigating a large search space to identify effective implementations, but they do so with opaque hardware details. Thus, their performance could fall behind that of hardware-native libraries (e.g., cuBLAS, cuDNN), which are hand-optimized by device vendors to extract high performance. On the other hand, these vendor libraries have a fixed set of supported functions and lack the customization and automation support afforded by auto-tuners. Bolt is based on the recent trend that vendor libraries are increasingly modularized and reconfigurable via declarative control (e.g., CUTLASS). It enables a novel approach that bridges this gap and achieves the best of both worlds, via hardware-native templated search. Bolt provides new opportunities to rethink end-to-end tensor optimizations at the graph, operator, and model levels. Bolt demonstrates this concept by prototyping on a popular auto-tuner in TVM and a class of widely-used platforms (i.e., NVIDIA GPUs) -- both in large deployment in our production environment. Bolt improves the inference speed of common convolutional neural networks by 2.5x on average over the state of the art, and it auto-tunes these models within 20 minutes.
Key facts. Cited by 18 papers in the map (data through 14 Oct 2026). Builds on 15 of its 33 references that are in the map. First posted on arXiv 25 Oct 2021.
Builds on
15 of 33 references.
References · 15
- 2015Deep Residual Learning for Image Recognitioncited by 52,096
- 2018BERT: Pre-training of Deep Bidirectional Transformers for Language Understandingcited by 40,399
- 2019PyTorch: An Imperative Style, High-Performance Deep Learning Librarycited by 20,305
- 2021Swin Transformer: Hierarchical Vision Transformer using Shifted Windowscited by 12,139
- 2016Gaussian Error Linear Units (GELUs)cited by 3,502
- 2019Searching for MobileNetV3cited by 1,994
- 2021RepVGG: Making VGG-style ConvNets Great Againcited by 522
- 2019Deep Learning Recommendation Model for Personalization and Recommendation Systemscited by 327
- 2020DCN V2: Improved Deep & Cross Network and Practical Lessons for Web-scale Learning to Rank Systemscited by 327
- 2014cuDNN: Efficient Primitives for Deep Learningcited by 245
- 2020Ansor: Generating High-Performance Tensor Programs for Deep Learningcited by 201
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3 more
- 2018Learning to Optimize Tensor Programscited by 140
- 2016Semantic Object Parsing with Graph LSTMcited by 44
- 2021Bring Your Own Codegen to Deep Learning Compilercited by 5
Built on by
Citing papers per year: 2022: 4; 2023: 2; 2024: 3; 2025: 6; 2026: 3.
18 papers.
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- 2023TorchSparse++: Efficient Training and Inference Framework for Sparse Convolution on GPUscited by 36
- 2022Hidet: Task-Mapping Programming Paradigm for Deep Learning Tensor Programscited by 28
- 2022TLP: A Deep Learning-based Cost Model for Tensor Program Tuningcited by 14
- 2026ZipServ: Fast and Memory-Efficient LLM Inference with Hardware-Aware Lossless Compressioncited by 8
- 2024QSync: Quantization-Minimized Synchronous Distributed Training Across Hybrid Devicescited by 3
- 2025PyGraph: Robust Compiler Support for CUDA Graphs in PyTorchcited by 3
- 2025Tilus: A Tile-Level GPGPU Programming Language for Low-Precision Computationcited by 3
- 2023Autotuning Apache TVM-based Scientific Applications Using Bayesian Optimizationcited by 2
- 2024Pruner: A Draft-then-Verify Exploration Mechanism to Accelerate Tensor Program Tuningcited by 2
- 2024Empower Vision Applications with LoRA LMMcited by 2
- 2022AGO: Boosting Mobile AI Inference Performance by Removing Constraints on Graph Optimizationcited by 1
- 2022ALT: Boosting Deep Learning Performance by Breaking the Wall between Graph and Operator Level Optimizationscited by 0
6 more
- 2025Accelerating Sparse Transformer Inference on GPUcited by 0
- 2025PerfDojo: Automated ML Library Generation for Heterogeneous Architecturescited by 0
- 2025DCC: Data-Centric Compilation of Machine Learning Kernels for Processing-In-Memory Architecturescited by 0
- 2025Spira: Exploiting Voxel Data Structural Properties for Efficient Sparse Convolution in Point Cloud Networkscited by 0
- 2026RedFuser: An Automatic Operator Fusion Framework for Cascaded Reductions on AI Acceleratorscited by 0
- 2026MATCHA: Efficient Deployment of Deep Neural Networks on Multi-Accelerator Heterogeneous Edge SoCscited by 0
- 2026MATCHA: Efficient Deployment of Deep Neural Networks on Multi-Accelerator Heterogeneous Edge SoCs10 Apr 2026
- 2026ZipServ: Fast and Memory-Efficient LLM Inference with Hardware-Aware Lossless Compression18 Mar 2026
- 2026RedFuser: An Automatic Operator Fusion Framework for Cascaded Reductions on AI Accelerators24 Feb 2026
- 2025Spira: Exploiting Voxel Data Structural Properties for Efficient Sparse Convolution in Point Cloud Networks25 Nov 2025
- 2025DCC: Data-Centric Compilation of Machine Learning Kernels for Processing-In-Memory Architectures19 Nov 2025
- 2025PerfDojo: Automated ML Library Generation for Heterogeneous Architectures5 Nov 2025
- 2025Accelerating Sparse Transformer Inference on GPU6 Jun 2025
- 2025Tilus: A Tile-Level GPGPU Programming Language for Low-Precision Computation17 Apr 2025
- 2025PyGraph: Robust Compiler Support for CUDA Graphs in PyTorch25 Mar 2025
- 2024Empower Vision Applications with LoRA LMM1 Nov 2024
- 2024QSync: Quantization-Minimized Synchronous Distributed Training Across Hybrid Devices2 Jul 2024
- 2024Pruner: A Draft-then-Verify Exploration Mechanism to Accelerate Tensor Program Tuning4 Feb 2024
6 more
- 2023TorchSparse++: Efficient Training and Inference Framework for Sparse Convolution on GPUs25 Oct 2023
- 2023Autotuning Apache TVM-based Scientific Applications Using Bayesian Optimization13 Sep 2023
- 2022AGO: Boosting Mobile AI Inference Performance by Removing Constraints on Graph Optimization2 Dec 2022
- 2022TLP: A Deep Learning-based Cost Model for Tensor Program Tuning7 Nov 2022
- 2022ALT: Boosting Deep Learning Performance by Breaking the Wall between Graph and Operator Level Optimizations22 Oct 2022
- 2022Hidet: Task-Mapping Programming Paradigm for Deep Learning Tensor Programs18 Oct 2022
- 2024Empower Vision Applications with LoRA LMMcited by 2
- 2024Empower Vision Applications with LoRA LMM1 Nov 2024
- 2023TorchSparse++: Efficient Training and Inference Framework for Sparse Convolution on GPUscited by 36
- 2022Hidet: Task-Mapping Programming Paradigm for Deep Learning Tensor Programscited by 28
- 2022TLP: A Deep Learning-based Cost Model for Tensor Program Tuningcited by 14
- 2024QSync: Quantization-Minimized Synchronous Distributed Training Across Hybrid Devicescited by 3
- 2025PyGraph: Robust Compiler Support for CUDA Graphs in PyTorchcited by 3
- 2025Tilus: A Tile-Level GPGPU Programming Language for Low-Precision Computationcited by 3
- 2023Autotuning Apache TVM-based Scientific Applications Using Bayesian Optimizationcited by 2
- 2024Pruner: A Draft-then-Verify Exploration Mechanism to Accelerate Tensor Program Tuningcited by 2
- 2022AGO: Boosting Mobile AI Inference Performance by Removing Constraints on Graph Optimizationcited by 1
- 2022ALT: Boosting Deep Learning Performance by Breaking the Wall between Graph and Operator Level Optimizationscited by 0
- 2025Accelerating Sparse Transformer Inference on GPUcited by 0
- 2025PerfDojo: Automated ML Library Generation for Heterogeneous Architecturescited by 0
12 most cited of 16 All 16 (JSON)
- 2026MATCHA: Efficient Deployment of Deep Neural Networks on Multi-Accelerator Heterogeneous Edge SoCs10 Apr 2026
- 2026RedFuser: An Automatic Operator Fusion Framework for Cascaded Reductions on AI Accelerators24 Feb 2026
- 2025Spira: Exploiting Voxel Data Structural Properties for Efficient Sparse Convolution in Point Cloud Networks25 Nov 2025
- 2025DCC: Data-Centric Compilation of Machine Learning Kernels for Processing-In-Memory Architectures19 Nov 2025
- 2025PerfDojo: Automated ML Library Generation for Heterogeneous Architectures5 Nov 2025
- 2025Accelerating Sparse Transformer Inference on GPU6 Jun 2025
- 2025Tilus: A Tile-Level GPGPU Programming Language for Low-Precision Computation17 Apr 2025
- 2025PyGraph: Robust Compiler Support for CUDA Graphs in PyTorch25 Mar 2025
- 2024QSync: Quantization-Minimized Synchronous Distributed Training Across Hybrid Devices2 Jul 2024
- 2024Pruner: A Draft-then-Verify Exploration Mechanism to Accelerate Tensor Program Tuning4 Feb 2024
- 2023TorchSparse++: Efficient Training and Inference Framework for Sparse Convolution on GPUs25 Oct 2023
- 2023Autotuning Apache TVM-based Scientific Applications Using Bayesian Optimization13 Sep 2023
12 newest of 16 All 16 (JSON)