TLP: A Deep Learning-based Cost Model for Tensor Program Tuning
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Abstract (arXiv)
Tensor program tuning is a non-convex objective optimization problem, to which search-based approaches have proven to be effective. At the core of the search-based approaches lies the design of the cost model. Though deep learning-based cost models perform significantly better than other methods, they still fall short and suffer from the following problems. First, their feature extraction heavily relies on expert-level domain knowledge in hardware architectures. Even so, the extracted features are often unsatisfactory and require separate considerations for CPUs and GPUs. Second, a cost model trained on one hardware platform usually performs poorly on another, a problem we call cross-hardware unavailability. In order to address these problems, we propose TLP and MTLTLP. TLP is a deep learning-based cost model that facilitates tensor program tuning. Instead of extracting features from the tensor program itself, TLP extracts features from the schedule primitives. We treat schedule primitives as tensor languages. TLP is thus a Tensor Language Processing task. In this way, the task of predicting the tensor program latency through the cost model is transformed into a natural language processing (NLP) regression task. MTL-TLP combines Multi-Task Learning and TLP to cope with the cross-hardware unavailability problem. We incorporate these techniques into the Ansor framework and conduct detailed experiments. Results show that TLP can speed up the average search time by 9.1X and 3.0X on CPU and GPU workloads, respectively, compared to the state-of-the-art implementation. MTL-TLP can achieve a speed-up of 4.7X and 2.9X on CPU and GPU workloads, respectively, using only 7% of the target hardware data.
Key facts. Cited by 14 papers in the map (data through 7 Oct 2026). Builds on 17 of its 43 references that are in the map. First posted on arXiv 7 Nov 2022.
Builds on
17 of 43 references.
References · 17
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- 2020Language Models are Few-Shot Learnerscited by 32,199
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- 2019TinyBERT: Distilling BERT for Natural Language Understandingcited by 1,153
- 2020Ansor: Generating High-Performance Tensor Programs for Deep Learningcited by 199
- 2016Recurrent Neural Network for Text Classification with Multi-Task Learningcited by 144
- 2018Learning to Optimize Tensor Programscited by 138
- 2018Tensor Comprehensions: Framework-Agnostic High-Performance Machine Learning Abstractionscited by 84
- 2018TVM: An Automated End-to-End Optimizing Compiler for Deep Learningcited by 62
- 2018Tiramisu: A Polyhedral Compiler for Expressing Fast and Portable Codecited by 53
- 2021A Deep Learning Based Cost Model for Automatic Code Optimizationcited by 33
- 2020Chameleon: Adaptive Code Optimization for Expedited Deep Neural Network Compilationcited by 29
5 more
- 2018Intel nGraph: An Intermediate Representation, Compiler, and Executor for Deep Learningcited by 22
- 2021Bolt: Bridging the Gap between Auto-tuners and Hardware-native Performancecited by 18
- 2017Exploiting Linguistic Resources for Neural Machine Translation Using Multi-task Learningcited by 11
- 2020ProTuner: Tuning Programs with Monte Carlo Tree Searchcited by 9
- 2022Moses: Efficient Exploitation of Cross-device Transferable Features for Tensor Program Optimizationcited by 3
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Citing papers per year: 2023: 2; 2024: 4; 2025: 4; 2026: 4.
14 papers.
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- 2025QiMeng-TensorOp: Automatically Generating High-Performance Tensor Operators with Hardware Primitivescited by 5
- 2023CDMPP: A Device-Model Agnostic Framework for Latency Prediction of Tensor Programscited by 3
- 2024Pruner: A Draft-then-Verify Exploration Mechanism to Accelerate Tensor Program Tuningcited by 2
- 2024PyGim: An Efficient Graph Neural Network Library for Real Processing-In-Memory Architecturescited by 2
- 2026AscendOptimizer: Episodic Agent for Ascend NPU Operator Optimizationcited by 2
- 2025GraphPerf-RT: A Graph-Driven Performance Model for Hardware-Aware Scheduling of OpenMP Codescited by 1
- 2026PassNet: Scaling Large Language Models for Graph Compiler Pass Generationcited by 1
- 2023ML-driven Hardware Cost Model for MLIRcited by 0
- 2024FTuner: A Fast Dynamic Shape Tensors Program Auto-Tuner for Deep Learning Compilerscited by 0
- 2024Enhancing Deployment-Time Predictive Model Robustness for Code Analysis and Optimizationcited by 0
- 2025COGNATE: Acceleration of Sparse Tensor Programs on Emerging Hardware using Transfer Learningcited by 0
- 2025Exploring the Feasibility of End-to-End Large Language Model as a Compilercited by 0
- 2026Hardware-Aware Features for CUTLASS Kernel Selection28 Sep 2026
- 2026PassNet: Scaling Large Language Models for Graph Compiler Pass Generation28 May 2026
- 2026TCL: Enabling Fast and Efficient Cross-Hardware Tensor Program Optimization via Continual Learning14 Apr 2026
- 2026AscendOptimizer: Episodic Agent for Ascend NPU Operator Optimization24 Mar 2026
- 2025GraphPerf-RT: A Graph-Driven Performance Model for Hardware-Aware Scheduling of OpenMP Codes12 Dec 2025
- 2025Exploring the Feasibility of End-to-End Large Language Model as a Compiler6 Nov 2025
- 2025COGNATE: Acceleration of Sparse Tensor Programs on Emerging Hardware using Transfer Learning31 May 2025
- 2025QiMeng-TensorOp: Automatically Generating High-Performance Tensor Operators with Hardware Primitives8 May 2025
- 2024Enhancing Deployment-Time Predictive Model Robustness for Code Analysis and Optimization31 Dec 2024
- 2024FTuner: A Fast Dynamic Shape Tensors Program Auto-Tuner for Deep Learning Compilers31 Jul 2024
- 2024PyGim: An Efficient Graph Neural Network Library for Real Processing-In-Memory Architectures26 Feb 2024
- 2024Pruner: A Draft-then-Verify Exploration Mechanism to Accelerate Tensor Program Tuning4 Feb 2024
2 more
- 2023CDMPP: A Device-Model Agnostic Framework for Latency Prediction of Tensor Programs16 Nov 2023
- 2023ML-driven Hardware Cost Model for MLIR14 Feb 2023
- 2025QiMeng-TensorOp: Automatically Generating High-Performance Tensor Operators with Hardware Primitivescited by 5
- 2023CDMPP: A Device-Model Agnostic Framework for Latency Prediction of Tensor Programscited by 3
- 2024Pruner: A Draft-then-Verify Exploration Mechanism to Accelerate Tensor Program Tuningcited by 2
- 2024PyGim: An Efficient Graph Neural Network Library for Real Processing-In-Memory Architecturescited by 2
- 2026AscendOptimizer: Episodic Agent for Ascend NPU Operator Optimizationcited by 2
- 2025GraphPerf-RT: A Graph-Driven Performance Model for Hardware-Aware Scheduling of OpenMP Codescited by 1
- 2026PassNet: Scaling Large Language Models for Graph Compiler Pass Generationcited by 1
- 2023ML-driven Hardware Cost Model for MLIRcited by 0
- 2024FTuner: A Fast Dynamic Shape Tensors Program Auto-Tuner for Deep Learning Compilerscited by 0
- 2024Enhancing Deployment-Time Predictive Model Robustness for Code Analysis and Optimizationcited by 0
- 2025COGNATE: Acceleration of Sparse Tensor Programs on Emerging Hardware using Transfer Learningcited by 0
- 2025Exploring the Feasibility of End-to-End Large Language Model as a Compilercited by 0
12 most cited of 14 All 14 (JSON)
- 2026Hardware-Aware Features for CUTLASS Kernel Selection28 Sep 2026
- 2026PassNet: Scaling Large Language Models for Graph Compiler Pass Generation28 May 2026
- 2026TCL: Enabling Fast and Efficient Cross-Hardware Tensor Program Optimization via Continual Learning14 Apr 2026
- 2026AscendOptimizer: Episodic Agent for Ascend NPU Operator Optimization24 Mar 2026
- 2025GraphPerf-RT: A Graph-Driven Performance Model for Hardware-Aware Scheduling of OpenMP Codes12 Dec 2025
- 2025Exploring the Feasibility of End-to-End Large Language Model as a Compiler6 Nov 2025
- 2025COGNATE: Acceleration of Sparse Tensor Programs on Emerging Hardware using Transfer Learning31 May 2025
- 2025QiMeng-TensorOp: Automatically Generating High-Performance Tensor Operators with Hardware Primitives8 May 2025
- 2024Enhancing Deployment-Time Predictive Model Robustness for Code Analysis and Optimization31 Dec 2024
- 2024FTuner: A Fast Dynamic Shape Tensors Program Auto-Tuner for Deep Learning Compilers31 Jul 2024
- 2024PyGim: An Efficient Graph Neural Network Library for Real Processing-In-Memory Architectures26 Feb 2024
- 2024Pruner: A Draft-then-Verify Exploration Mechanism to Accelerate Tensor Program Tuning4 Feb 2024
12 newest of 14 All 14 (JSON)