mlsanityData to 7 Oct 2026

Improving DNN Fault Tolerance using Weight Pruning and Differential Crossbar Mapping for ReRAM-based Edge AI

arXiv 2106.09166 ↗First posted 16 Jun 2021cs.LG cs.AI cs.PFcited by 10

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Abstract (arXiv)

Recent research demonstrated the promise of using resistive random access memory (ReRAM) as an emerging technology to perform inherently parallel analog domain in-situ matrix-vector multiplication -- the intensive and key computation in deep neural networks (DNNs). However, hardware failure, such as stuck-at-fault defects, is one of the main concerns that impedes the ReRAM devices to be a feasible solution for real implementations. The existing solutions to address this issue usually require an optimization to be conducted for each individual device, which is impractical for mass-produced products (e.g., IoT devices). In this paper, we rethink the value of weight pruning in ReRAM-based DNN design from the perspective of model fault tolerance. And a differential mapping scheme is proposed to improve the fault tolerance under a high stuck-on fault rate. Our method can tolerate almost an order of magnitude higher failure rate than the traditional two-column method in representative DNN tasks. More importantly, our method does not require extra hardware cost compared to the traditional two-column mapping scheme. The improvement is universal and does not require the optimization process for each individual device.

Key facts. Cited by 10 papers in the map (data through 7 Oct 2026). Builds on 19 of its 39 references that are in the map. First posted on arXiv 16 Jun 2021.

Builds on

19 of 39 references.

References · 19

  1. 2018BERT: Pre-training of Deep Bidirectional Transformers for Language Understandingcited by 40,204
  2. 2015Deep Compression: Compressing Deep Neural Networks with Pruning, Trained Quantization and Huffman Codingcited by 2,291
  3. 2018The Lottery Ticket Hypothesis: Finding Sparse, Trainable Neural Networkscited by 2,250
  4. 2017Channel Pruning for Accelerating Very Deep Neural Networkscited by 697
  5. 2016Learning Structured Sparsity in Deep Neural Networkscited by 538
  6. 2018A Systematic DNN Weight Pruning Framework using Alternating Direction Method of Multiplierscited by 118
  7. 2017CirCNN: Accelerating and Compressing Deep Neural Networks Using Block-CirculantWeight Matricescited by 53
  8. 2018ADMM-NN: An Algorithm-Hardware Co-Design Framework of DNNs Using Alternating Direction Method of Multiplierscited by 42
  9. 2020Exploiting Neuron and Synapse Filter Dynamics in Spatial Temporal Learning of Deep Spiking Neural Networkcited by 36
  10. 2019Non-Structured DNN Weight Pruning -- Is It Beneficial in Any Platform?cited by 31
  11. 2019ResNet Can Be Pruned 60x: Introducing Network Purification and Unused Path Removal (P-RM) after Weight Pruningcited by 13
  12. 2019An Ultra-Efficient Memristor-Based DNN Framework with Structured Weight Pruning and Quantization Using ADMMcited by 12
7 more
  1. 2020TIMELY: Pushing Data Movements and Interfaces in PIM Accelerators Towards Local and in Time Domaincited by 11
  2. 2018Neuro-memristive Circuits for Edge Computing: A reviewcited by 7
  3. 2019Tiny but Accurate: A Pruned, Quantized and Optimized Memristor Crossbar Framework for Ultra Efficient DNN Implementationcited by 7
  4. 2020Multivariate Time Series Classification Using Spiking Neural Networkscited by 5
  5. 2018Towards Ultra-High Performance and Energy Efficiency of Deep Learning Systems: An Algorithm-Hardware Co-Optimization Frameworkcited by 4
  6. 2018An Area and Energy Efficient Design of Domain-Wall Memory-Based Deep Convolutional Neural Networks using Stochastic Computingcited by 2
  7. 2018Scalable NoC-based Neuromorphic Hardware Learning and Inferencecited by 1

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Cited by year

Citing papers per year: 2021: 2; 2022: 4; 2023: 1; 2024: 2; 2025: 1.

10 papers.

  1. 2021SPViT: Enabling Faster Vision Transformers via Soft Token Pruningcited by 165
  2. 2021QuantumNAS: Noise-Adaptive Search for Robust Quantum Circuitscited by 97
  3. 2022A Length Adaptive Algorithm-Hardware Co-design of Transformer on FPGA Through Sparse Attention and Dynamic Pipeliningcited by 21
  4. 2022Towards Sparsification of Graph Neural Networkscited by 18
  5. 2023RRNet: Towards ReLU-Reduced Neural Network for Two-party Computation Based Private Inferencecited by 12
  6. 2022PolyMPCNet: Towards ReLU-free Neural Architecture Search in Two-party Computation Based Private Inferencecited by 2
  7. 2024FARe: Fault-Aware GNN Training on ReRAM-based PIM Acceleratorscited by 2
  8. 2022FlatENN: Train Flat for Enhanced Fault Tolerance of Quantized Deep Neural Networkscited by 0
  9. 2024Memory Faults in Activation-sparse Quantized Deep Neural Networks: Analysis and Mitigation using Sharpness-aware Trainingcited by 0
  10. 2025EPSILON: Adaptive Fault Mitigation in Approximate Deep Neural Network using Statistical Signaturescited by 0