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Relay: A New IR for Machine Learning Frameworks

arXiv 1810.00952 ↗First posted 26 Sep 2018cs.PL cs.LGcited by 24

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Abstract (arXiv)

Machine learning powers diverse services in industry including search, translation, recommendation systems, and security. The scale and importance of these models require that they be efficient, expressive, and portable across an array of heterogeneous hardware devices. These constraints are often at odds; in order to better accommodate them we propose a new high-level intermediate representation (IR) called Relay. Relay is being designed as a purely-functional, statically-typed language with the goal of balancing efficient compilation, expressiveness, and portability. We discuss the goals of Relay and highlight its important design constraints. Our prototype is part of the open source NNVM compiler framework, which powers Amazon's deep learning framework MxNet.

Key facts. Cited by 24 papers in the map (data through 14 Oct 2026). First posted on arXiv 26 Sep 2018.

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Citing papers per year: 2020: 1; 2021: 7; 2022: 9; 2023: 5; 2024: 0; 2025: 2.

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  1. 2020GShard: Scaling Giant Models with Conditional Computation and Automatic Shardingcited by 1,631
  2. 2021GSPMD: General and Scalable Parallelization for ML Computation Graphscited by 111
  3. 2022SparseTIR: Composable Abstractions for Sparse Compilation in Deep Learningcited by 47
  4. 2023Zero Bubble Pipeline Parallelismcited by 40
  5. 2023Relax: Composable Abstractions for End-to-End Dynamic Machine Learningcited by 12
  6. 2021UNIT: Unifying Tensorized Instruction Compilationcited by 10
  7. 2022ImpNet: Imperceptible and blackbox-undetectable backdoors in compiled neural networkscited by 9
  8. 2021A Highly Configurable Hardware/Software Stack for DNN Inference Accelerationcited by 4
  9. 2021SplitSR: An End-to-End Approach to Super-Resolution on Mobile Devicescited by 3
  10. 2022Memory Planning for Deep Neural Networkscited by 3
  11. 2021Collage: Seamless Integration of Deep Learning Backends with Automatic Placementcited by 2
  12. 2022CPrune: Compiler-Informed Model Pruning for Efficient Target-Aware DNN Executioncited by 2
12 more
  1. 2021Understanding Cache Boundness of ML Operators on ARM Processorscited by 1
  2. 2021Joint Program and Layout Transformations to enable Convolutional Operators on Specialized Hardware based on Constraint Programmingcited by 1
  3. 2022Bifrost: End-to-End Evaluation and Optimization of Reconfigurable DNN Acceleratorscited by 1
  4. 2022AGO: Boosting Mobile AI Inference Performance by Removing Constraints on Graph Optimizationcited by 1
  5. 2023DIPPM: a Deep Learning Inference Performance Predictive Model using Graph Neural Networkscited by 1
  6. 2022A Compilation Flow for the Generation of CNN Inference Accelerators on FPGAscited by 0
  7. 2022Faith: An Efficient Framework for Transformer Verification on GPUscited by 0
  8. 2022ALT: Boosting Deep Learning Performance by Breaking the Wall between Graph and Operator Level Optimizationscited by 0
  9. 2023SparseOptimizer: Sparsify Language Models through Moreau-Yosida Regularization and Accelerate via Compiler Co-designcited by 0
  10. 2023A Survey on Design Methodologies for Accelerating Deep Learning on Heterogeneous Architecturescited by 0
  11. 2025LightCode: Compiling LLM Inference for Photonic-Electronic Systemscited by 0
  12. 2025Accelerated Execution of Bayesian Neural Networks using a Single Probabilistic Forward Pass and Code Generationcited by 0